Method of manufacturing semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S138000, C438S285000, C257S335000, C257SE21417

Reexamination Certificate

active

07871888

ABSTRACT:
A p−RESURF region is formed as a surface layer in an n−semiconductor layer. Then, trenches, gate insulating films, and a thick insulating film, gate electrodes, and a gate polysilicon interconnection are formed in this order. Subsequently, a p-well region is formed using the gate polysilicon interconnection as a mask. Then n+source regions are formed. Since the p−RESURF region is formed and the p-well region is formed after forming the gate electrodes and the gate polysilicon interconnection, the severeness of a high-temperature heat history is lowered and the diffusion depth of the p-well region is decreased. The formation of the p−RESURF region and the shallow p-well region makes it possible to reduce the on-resistance while increasing the breakdown voltage, as well as reducing the gate capacitance.

REFERENCES:
patent: 6118150 (2000-09-01), Takahashi
patent: 2010/0123195 (2010-05-01), Lee
patent: 8-78668 (1996-03-01), None
patent: 10-56174 (1998-02-01), None
patent: 3410286 (2003-03-01), None
patent: 2006-80177 (2006-03-01), None

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