Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-07-19
2011-07-19
Brewster, William M. (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S757000
Reexamination Certificate
active
07981743
ABSTRACT:
The memory cell of the present invention has two independent storage regions embedded into two opposite sidewalls of the control gate respectively. In this way, the data storage can be more reliable. Other features of the present invention are that the thickness of the dielectric layers is different, and the two independent storage regions are formed on opposite bottom sides of the opening by the etching process and form a shape like a spacer. The advantage of the aforementioned method is that the fabricating process is simplified and the difficulty of self-alignment is reduced.
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patent: 5923063 (1999-07-01), Liu et al.
patent: 6174753 (2001-01-01), Liao
patent: 6392267 (2002-05-01), Shrivastava et al.
patent: 2001/0034106 (2001-10-01), Moise et al.
patent: 2006/0113547 (2006-06-01), Shin
Chen Mao-Quan
Hsiao Ching-Nan
Huang Chung-Lin
Brewster William M.
Hsu Winston
Margo Scott
Nanya Technology Corp.
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