Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-05-03
2011-05-03
Doan, Theresa T (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S903000, C257S513000, C438S618000, C438S622000
Reexamination Certificate
active
07936024
ABSTRACT:
A method of forming a semiconductor device may include forming an interlayer insulating layer on a semiconductor substrate, and the interlayer insulating layer may have a contact hole therein exposing a portion of the semiconductor substrate. A single crystal semiconductor plug may be formed in the contact hole and on portions of the interlayer insulating layer adjacent the contact hole opposite the semiconductor substrate, and portions of the interlayer insulating layer opposite the semiconductor substrate may be free of the single crystal semiconductor plug. Portions of the single crystal semiconductor plug in the contact hole may be removed while maintaining portions of the single crystal semiconductor plug on portions of the interlayer insulating layer adjacent the contact hole as a single crystal semiconductor contact pattern. After removing portions of the single crystal semiconductor plug, a single crystal semiconductor layer may be formed on the interlayer insulating layer and on the single crystal semiconductor contact pattern. A second interlayer insulating layer may be formed on the single crystal semiconductor layer, and a common contact hole may be formed through the second interlayer insulating layer, through the single crystal semiconductor layer, and through the first interlayer insulating layer to expose a portion of semiconductor substrate. In addition, a conductive contact plug may be formed in the common contact hole in contact with the semiconductor substrate. Related devices are also discussed.
REFERENCES:
patent: 4272880 (1981-06-01), Pashley
patent: 5612552 (1997-03-01), Owens
patent: 5747367 (1998-05-01), Kadosh et al.
patent: 5819069 (1998-10-01), Wong et al.
patent: 6232637 (2001-05-01), Gardner et al.
patent: 7326960 (2008-02-01), Gonzalez
Choi Gil-heyun
Jung Eun-Ji
Jung Sug-Woo
Kim Hyun-Su
Yun Jong-Ho
Doan Theresa T
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronics Co,. Ltd.
LandOfFree
Semiconductor devices having stacked structures does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor devices having stacked structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor devices having stacked structures will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2630196