Process for making low dielectric constant dielectric films

Details Process for making low dielectric constant dielectric films Process for making low dielectric constant dielectric films

2000-08-31

2001-12-18

Smith, Matthew S. (Department: 2825)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

By reaction with substrate

C438S758000, C438S558000, C438S542000, C438S510000, C438S231000

Reexamination Certificate

active

06331493

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a process for forming a dielectric film having a low dielectric constant. In the process of the present invention, a dielectric film is etched with an oxygen plasma to form voids in the dielectric film. These voids serve to reduce the dielectric constant of the dielectric film. The present invention also relates to semiconductor devices which incorporate such reduced dielectric constant dielectric films.
In very large scale integrated (VLSI) circuit devices, several wiring layers connect the active and/or passive elements in a semiconductor chip. The interconnection structure comprises thin conductive lines which are separated by an insulation material in one layer or level and which are connected through vias or studs from contacts of the elements of the semiconductor chip or to a similar layer in another level of interconnections. This interconnection structure is similar to a transmission line because signals-being transmitted in these wiring layers experience propagation delays. Propagation delays are referred to as being RC delays because they depend upon the resistance (R) of the material of the conductive line or runner and the capacitance (C) between adjacent lines. With the present trend toward more and more levels of integration on these circuit devices, the spaces between adjacent lines in which to insert insulation material are being narrowed. These narrower spaces increase the capacitance between adjacent lines and place increased demands on the insulative properties of the insulation material formed between the conductive lines.
The capacitance (C) of a material is calculated by multiplying the dielectric constant (&kgr;) of the material by the area (A) of the opposing faces of the conductive lines and dividing the product by the distance (D) between the conductive lines. A decrease in the distance between the conductive lines results in an increase in capacitance. Since signal delay of a signal transmitted on the conductive lines is controlled by the RC constant, an increase in capacitance degrades the performance of the integrated circuit.
Currently in the art, silicon compounds are used as the insulation material between the conductive lines. Silicon dioxide, for example, has a dielectric constant between 3.5 and 4.0. In comparison, a vacuum has a dielectric constant of 0 and provides the basis for measurement of the dielectric constant of materials. As another example, air and other insulating gases each have a dielectric constant of about 1 or slightly-less than 1.
Organic films, such as polyimides, silosesquioxanes and hydroxysilsequioxanes, have been proposed for use as insulation layers between adjacent conductive lines. While most organic dielectric films have a dielectric constant (&kgr;) which is lower than that of silicon dioxide, organic dielectric films are more subject to contamination and shrinkage than silicon dioxide films. Further, organic dielectric films are hydroscopic and any absorbed moisture has the potential to corrode the metal lines. Additionally, organic films are also not as thermally and structurally stable as silicon dioxide films. Thus, it is not currently desirable to use organic based dielectric films in the formation of VLSI circuit devices.
One solution has been proposed by Avanzino et al. in U.S. Pat. No. 5,691,573. Avanzino et al. propose conventionally depositing an insulating layer on and between conductive lines and then masking the conductive lines and removing the insulation in the gap between the lines. A nonconformal silicon containing insulating layer is then deposited in the narrow gap and, due to the nonconformal step coverage, only a thin layer is coated on the vertical walls of the conductive lines on opposite sides of the narrow gaps. However, a thick layer forms on the top and shoulders of the conductive lines. As the insulation layer grows, the thick layer reduces the width of the gap at the top of the lines until it bridges across the narrow gap and creates a void between the lines. At least one-third of the gap is filled so that the effective dielectric constant of the combined insulating material and the void is at or below about 3. However, the process described by Avanzino et al. requires a considerable amount of time to complete because of the number of steps involved in the process.
U.S. Pat. No. 5,598,026 to Kapoor et al. proposes forming a porous layer of a dielectric material to serve as an insulation layer between two conductive layers of an integrated circuit. Kapoor et al. teach that the porous layer of dielectric material is formed by depositing a composite layer comprising a mixture of two or more materials. At least one of the materials which forms the mixture is extractable from the mixture after the layer is formed and at least one other material which forms the mixture will remain after the extraction as a porous matrix comprising a low dielectric constant insulation material. The low dielectric constant material will have a dielectric constant of less than 3.9, the dielectric constant of SiO
2
. The extractable material is removed from the layer to remain by means of a solvent which removes the extractable material and produces the low dielectric constant insulation material. To avoid contamination problems in the low dielectric constant insulation material, one or more layers of nonporous low dielectric constant insulation materials are preferably also formed above and/or below the porous matrix comprising the low dielectric constant insulation material. However, the Kapoor et al. process may cause contaminants to be introduced into the VLSI circuit device fabrication process through the use of a solvent to remove the extractable material. Further, the Kapoor et al. process can not be performed in situ.
Another solution is provided in U.S. Pat. No. 5,723,368 to Cho et al. Cho et al. describe a method for making a porous dielectric material for use in semiconductor devices. In the method taught by Cho et al., surface hydroxyl groups are removed from the surface of a porous substrate by baking the substrate in the range of 100° C. to 490° C. The porous substrate is formed from a gel which requires generally about one day of aging before the water content of the gel is removed to create the pores. The method may farther comprise baking the substrate in a reducing atmosphere. More preferably, the reaction is carried out at or below ambient pressure. However, this process requires several additional steps, some of which can not be performed in situ and others which require an extended amount of time to complete.
Thus, a need still exists in the art for a method for forming a dielectric layer for a semiconductor device in which the dielectric layer has a reduced dielectric constant. Desirably, this method would be simpler, faster, and involve fewer steps than currently used processes and would be less subject to contamination. A need also exists for semiconductor devices which incorporate a layer of dielectric material which has a reduced dielectric constant.
SUMMARY OF THE INVENTION
The present invention provides a solution to the current needs in the art by providing a method for forming a layer of a dielectric material between adjacent conductive lines such that the dielectric constant of the dielectric material is reduced. This reduction in the dielectric constant of the dielectric material results in a corresponding decrease in the capacitance of the dielectric material thus reducing RC delays. The method of the present invention is simpler and involves fewer steps than conventional processes. The method of the present invention is less subject to contamination because it does not employ organic films or use solvents to remove a component of the dielectric layer to cause the dielectric constant of the layer of dielectric material to be reduced.
One aspect of the present invention is directed to a process for controllably reducing the dielectric constant of a layer of dielectric material. The process includes the step of exposing

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