Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-01-06
2001-10-16
Chaudhari, Chandra (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S654000
Reexamination Certificate
active
06303426
ABSTRACT:
FIELD OF THE INVENTION
The present invention is directed to a capacitor formed in a semiconductor wafer and, more particularly, to a method of forming a capacitor in a semiconductor wafer by nitridizing a tungsten plug which forms the capacitor bottom electrode prior to forming the capacitor dielectric and capacitor top electrode.
BACKGROUND OF INVENTION
In forming a capacitor having a tungsten bottom electrode, chemical vapor deposition (CVD) is typically used to deposit a metal oxide film such as tantalum oxide or titanium oxide to form the capacitor dielectric over the bottom electrode. However, in forming the bottom electrode, a seed material such as titanium nitride is used to grow the tungsten bottom electrode and consequently, that seed material forms a thin layer on the outer surface of the formed tungsten bottom electrode. That thin layer will react with the metal oxide during the formation of the capacitor dielectric and cause the surface of the bottom electrode to oxidize, which results in leakage current problems between the electrode and dielectric. Oxidation of tungsten electrodes also produces oxides that are volatile and lead to adhesion problems.
Current solutions for polysilicon and silicon nitride electrodes require depositing a dielectric thickness of 10 nm or less and annealing the dielectric at a temperature greater than 600° C. However, oxidation of polysilicon and silicon nitride electrodes produce capacitors having low dielectric constants, and the solutions for polysilicon and silicon nitride bottom electrodes are not instructive for the above-described problems associated with tungsten bottom electrodes.
SUMMARY OF THE INVENTION
The present invention is directed to a method of forming a capacitor having a tungsten bottom electrode in a semiconductor wafer that eliminates the effects of oxidation of the surface of the bottom electrode on capacitor performance. The capacitor is included within the metal layer of a conventional integrated circuit to minimize changes to the process flow.
The present invention is directed to a method of forming a capacitor in a semiconductor wafer having a plurality of stacked layers including a substrate, a first dielectric layer including a via that extends through the first dielectric layer and contacts the substrate. The semiconductor wafer also includes a second dielectric layer having a tungsten plug that extends through the second dielectric and contacts the via and that forms a bottom electrode of the capacitor. The method of the present invention comprises a first step of removing a part of the second substrate around the plug to expose a surface thereof. The exposed surface of the plug is then nitridized to form Tungsten Nitride (WN) or Titanium Nitride (TiN) and a capacitor dielectric is formed from a metal oxide material deposited over the nitridized surface of the plug. Alternatively, a metal-nitride is deposited over the tungsten plug to form the bottom capacitor plate. The capacitor dielectric is then annealed and a top electrode of the capacitor is formed over the capacitor dielectric.
The present invention is also directed to an integrated circuit formed on a semiconductor wafer in accordance with the above-described method.
The present invention is further directed to a method of forming a capacitor in a semiconductor wafer having a plurality of stacked layers including a substrate, a first dielectric layer including a via that extends through the first dielectric layer and contacts the substrate. The semiconductor wafer and includes a second dielectric layer having a tungsten plug that extends through the second dielectric and contacts the via and that forms a bottom electrode of the capacitor. The method of the present invention comprises a first step of removing part of the second dielectric layer to expose the tungsten plug. A metal-nitride material is then deposited in blanket fashion over the first dielectric layer left exposed by the removal of the part of the second dielectric layer, including over the exposed tungsten plug. The metal-nitride material is then patterned so that only the tungsten plug remains covered. A capacitor dielectric is then formed by depositing a metal oxide material over the metal-nitride covered tungsten plug, and the capacitor dielectric is annealed. A top electrode of the capacitor is then formed over the capacitor dielectric.
Other objects and features of the present invention will become apparent from the following detailed description, considered in conjunction with the accompanying drawing figures. It is to be understood, however, that the drawings, which are not to scale, are designed solely for the purpose of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims.
REFERENCES:
patent: 5773314 (1998-06-01), Jiang et al.
patent: 5930639 (1999-07-01), Schuele et al.
patent: 6190994 (2001-02-01), Seo
Agere Systems Guardian Corp.
Chaudhari Chandra
Stroock & Stroock & Lavan LLP
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