Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-11-04
2001-12-25
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S258000
Reexamination Certificate
active
06333223
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device comprising MOSFETs having respective gate insulating films with different thicknesses and to a method of manufacturing the same.
As higher-speed operations have been achieved in recent semiconductor integrated circuit devices, the thickness of the gate insulating film of a MOSFET has been reduced increasingly.
On the other hand, a lower driving voltage has been pursued for a logic circuit in a semiconductor integrated circuit with the view to lowering the power consumption of the semiconductor integrated circuit device. In the peripheral circuit of the logic circuit for performing input/output operations, however, it is necessary to drive a MOSFET with a voltage inputted from the outside. To hold its breakdown voltage high, therefore, a transistor provided in the peripheral circuit of the logic circuit uses a gate insulating film having a larger thickness than a transistor provided in the internal circuit of the logic circuit.
A description will be given to a method of manufacturing MOSFETs having respective gate insulating films with different thicknesses.
First, as shown in FIG.
10
(
a
), isolation region
11
are formed in a semiconductor substrate
10
made of silicon, followed by a first silicon oxide film
12
a
with a thickness of, e.g., 4 nm formed over the entire surface of the semiconductor substrate
10
to serve as agate insulating film. Thereafter, a resist pattern
13
is formed on the portion of the first silicon oxide film
12
a
corresponding to the peripheral circuit region of a logic circuit. Wet etching is then performed by using, e.g., hydrofluoric acid with respect to the first silicon oxide film
12
a
, thereby selectively removing the portion of the first silicon oxide film
12
a
corresponding to the internal circuit region of the logic circuit.
Next, as shown in FIG.
10
(
b
), a second silicon oxide film
12
b
with a thickness of, e.g., 3 nm is formed over the entire surface of the semiconductor substrate
10
.
Next, as shown in FIG.
10
(
c
), a first gate insulating film
14
A composed of the second silicon oxide film
12
b
and a first gate electrode
15
A composed of a polysilicon film are formed in the internal circuit region of the logic circuit, while a second gate insulating film
14
B composed of the first and second silicon oxide films
12
a
and
12
b
and a second gate electrode
15
B composed of the polysilicon film are formed in the peripheral circuit region of the logic circuit.
Next, an impurity is implanted by using the first and second gate electrodes
15
A and
15
B as a mask to form lightly doped regions
16
. Then, sidewalls
17
are formed on each of the first and second gate electrodes
15
A and
15
B. After that, an impurity is implanted by using, as a mask, the first and second gate electrodes
15
A and
15
B and the sidewalls to form heavily doped regions
18
.
As a result, a first MOSFET including the first gate insulating film
14
A composed of the second silicon oxide film
12
b
and having a thickness of 3 nm is obtained in the internal circuit region of the logic circuit, while a second MOSFET including the second gate insulating film
14
B composed of the first and second silicon oxide films
12
a
and
12
b
and having a thickness of 7 nm is obtained in the peripheral circuit region of the logic circuit.
In accordance with the conventional method of manufacturing a semiconductor device, however, the second gate insulating film
14
B obtained in the peripheral circuit of the logic circuit is formed in two separate steps, so that it is difficult for the second gate insulating film
14
B to have a lifespan which is as long as the lifespan of a gate oxide film obtained in one oxidation step. This is because the second silicon oxide film
12
b
composing the second gate insulating film
14
B is formed on the first silicon oxide film
12
a
after the resist pattern
13
is removed. Since the surface of the first silicon oxide film
12
a
has been contaminated or damaged in the step of removing the resist pattern
13
, the reliability of the gate insulating film
14
B is degraded.
SUMMARY OF THE INVENTION
In view o f the foregoing, it is therefore an object of the present Invention to improve the reliability of each of first and second gate insulating films having different thicknesses.
A first semiconductor device according to the present invention comprises a first MOSFET and a second MOSFET, the first MOSFET including: a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness; and a first gate electrode composed of a polysilicon film formed on the first gate insulating film, the second MOSFET including: a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness; and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
In the first semiconductor device, the first gate insulating film of the first MOSFET has a relatively large thickness. Accordingly, the first MOSFET can be driven with a high voltage.
On the other hand, the second gate insulating film of the second MOSFET has a relatively small thickness. Accordingly, the second MOSFET can be driven with a low voltage so that power consumption is reduced. Since the second gate electrode is composed of the metal film made of a refractory metal or a compound of a refractory metal, the depletion of the second gate electrode can be prevented and the performance of the second MOSFET is improved.
With the first semiconductor device, therefore, the first MOSFET can be driven with a high voltage, while the second MOSFET can be driven with a low voltage and the depletion of the second gate electrode at the interface between itself and the gate insulating film is prevented. This increases the performance of the gate electrode and allows the formation of the two MOSFETs, of which different performances are required, on a single semiconductor substrate with high reliability.
In the first semiconductor device, the first MOSFET is preferably formed in a region of the semiconductor substrate corresponding to a peripheral circuit region of a logic circuit and the second MOSFET is preferably formed in a region of the semiconductor substrate corresponding to an internal circuit region of the logic circuit.
The arrangement enables driving with a high voltage which is required in the peripheral circuit of the logic circuit as well as driving with a low voltage which is required in the internal circuit of the logic circuit, while increasing the performance of the transistors.
In the first semiconductor device, the first MOSFET is preferably formed in a memory cell region of the semiconductor substrate and the second MOSFET is preferably formed in a logic circuit region of the semiconductor substrate.
The arrangement prevents a reduction in pause time (charge retention time of one memory cell) resulting from a leakage current, which is required in the memory cell, while increasing the performance of the MOSFETs, which is required in the logic circuit.
Preferably, the first semiconductor device further comprises a resistor composed of a polysilicon film formed in the step of forming the polysilicon film composing the first gate electrode. In the arrangement, a resistor can be provided without increasing the number of process steps.
In the first semiconductor device, the first gate insulating film is preferably composed of a silicon oxide film and the second gate insulating film is preferably composed of a silicon oxynitride film.
This further reduces the thickness of the second gate insulating film and increases the reliability thereof, thereby increasing the performance of the second MOSFET.
A second semiconductor device according to the present invention comprises a first MOSFET and a second MOSFET, the first MOSFET including: a first gate insulating film formed on a semiconductor substrate and having a relativ
Moriwaki Masaru
Yamada Takayuki
Kennedy Jennifer M.
Matsushita Electric - Industrial Co., Ltd.
Niebling John F.
Nixon & Peabody LLP
Robinson Eric J.
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