Method for producing a capacitor

Details Method for producing a capacitor Method for producing a capacitor

1998-11-25

2001-05-15

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S250000, C438S253000, C438S386000, C438S396000

Reexamination Certificate

active

06232169

ABSTRACT:

BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a method for producing a capacitor and to a semiconductor memory device having a multiplicity of memory cells disposed on a semiconductor substrate, wherein each of the memory cells has a selection transistor being disposed in a semiconductor substrate and having a gate terminal and first and second electrode terminals, each of the memory cells has a storage capacitor being associated with and triggerable by the selection transistor and having a ferroelectric dielectric and first and second capacitor electrodes, the gate terminal of each selection transistor is connected to a word line of the semiconductor memory device, the first electrode terminal of each selection transistor is connected to a bit line, and the first capacitor electrode of each storage capacitor is connected to a common conductor layer of electrically conductive material. The invention also relates to a method for producing such a semiconductor memory device.
Such a semiconductor memory device having a storage capacitor with a ferroelectric dielectric (a so-called FRAM) is known, for instance, from The 1994 Symposium on VLSI Technology Digest of Technical Papers, pp. 55 ff. by R. Moazzami et al, and from The 1994 IEEE International Solid-State Circuits Conference, pp. 268 ff. by Tatsumi Sumi et al. In that semiconductor memory device the storage capacitors with the ferroelectric dielectric are constructed in planar fashion and additionally, because of the wiring, have cell surface areas of considerable size per bit, which is considered to be disadvantageous in the view of a desired large scale of integration. Despite the problems that so far still exist, a great future is predicted for ferroelectric memories or FRAMs. They could entirely replace present semiconductor memories (DRAMs, SRAMS, EEPROMS, flash EEPROMS). The advantage of FRAMs resides above all in the brief programming time (>20 ns), a low programming voltage (from about 3 V of supply voltage to the ICs), low energy consumption in programming (no charge pump required), and frequent programmability (10
12
demonstrated and 101
5
expected, as compared with 10
5
in EEPROMS). Examples of materials for the ferroelectric layer that appear especially promising at present are lead zirconium titanate, strontium tantalate, or compounds thereof. One of the problems that are still an obstacle to rapid introduction of FRAM technology is an as-yet unsolved compatibility with a production process for integrated circuits. In particular, the necessity for platinum electrodes in the ferroelectric storage capacitor and spin-on coating, which heretofore has been conventional, for applying a ferroelectric gel, which is associated with a relatively great layer thickness and thus a capacitance that requires a large surface area, heretofore prevented profitable use in semiconductor technology, so that heretofore no process for producing FRAMs that was suitable for mass production was known. In that respect it must also be remembered that depositing the relatively complex materials for the ferroelectric dielectric and associated therewith the problem of a satisfactory source suitable for the process, and moreover a lack of quality of the layers because of fissuring, leakage currents, temperature influences and electrode adhesion, all contribute to problems of process integration. In particular, the ferroelectric materials known heretofore react especially sensitively to hydrogen. However, hydrogen can hardly be suppressed in the known methods for producing a semiconductor memory device, and in such methods it occurs especially in plasma deposition processes and plasma etching processes.
In addition to the FRAM cells, large-scale integration DRAM semiconductor memories with conventional materials for the storage capacitor dielectric are known. In order to make DRAM semiconductor memories with a memory capacity of up to about 256 MB at present, dielectrics with a high dielectric constant are used so that as the cell area becomes smaller an adequate capacitance, typically of more than about 20 fF per cell, is still attainable. Heretofore, for those purposes, an ONO layer has been used in most cases, but its technological limits have become apparent in the meantime, since upon a further reduction in thickness the leakage current rises above the predetermined limit value, and adequate capacitances (surface areas) can be obtained only through the use of such complicated structures as trench or stacked capacitors. For those reasons, new materials that have a high enough dielectric constant are therefore increasingly being used for the dielectric of the storage capacitor. However, the alternative dielectric materials known thus far are extremely sensitive to the usual strains arising in the method used heretofore to produce a semiconductor memory device, namely stability to high process temperatures, undesired chemical reactions, and the like.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a method for producing a capacitor and a semiconductor memory device, which overcome the hereinafore-mentioned disadvantages of the heretofore-known methods and devices of this general type, in which the semiconductor memory device has a ferroelectric storage capacitor that has a scale of integration which is virtually comparable to present DRAM circuits with suitably high reliability and quality, and in which the method for producing such a semiconductor memory device can be integrated at comparatively little expense into existing process sequences and is suitable for mass production, or in other words that enables a high yield of finished semiconductor circuit devices or semiconductor memory devices with ferroelectric storage capacitors, with the least possible number of premature failures.
With the foregoing and other objects in view there is provided, in accordance with the invention, a method for producing a capacitor having a dielectric, a first capacitor electrode and a second capacitor electrode in a semiconductor circuit device formed on a semiconductor substrate, which comprises forming a trench in a layer applied to the substrate of the semiconductor circuit device; depositing an electrically conductive layer for the second capacitor electrode in a deposition being inside the trench and at least regionally conformal with side walls of the trench; conformally depositing an auxiliary layer acting as a space-holder for the dielectric in a deposition being inside the trench and on the electrically conductive layer for the second capacitor electrode; conformally depositing an electrically conductive layer for the first capacitor electrode in a deposition being inside the trench and on the auxiliary layer; at least partial removing the auxiliary layer and exposing a hollow layer in at least a partial region between the two electrically conductive layers for the first and second capacitor electrodes; and depositing the dielectric into the exposed hollow layer between the two electrically conductive layers for the first and second capacitor electrodes.
In accordance with another mode of the invention, the step of deposition of the dielectric layer is performed through the use of spin-on coating.
In accordance with a further mode of the invention, the dielectric layers are applied with a layer thickness in the manometer range, which because of their viscous, paintlike consistency can preferably be applied by spin-on coating.
The dielectric, having a material which is preferably in the form of a substrate introduced by spin-on coating in a solvent, is deposited into the exposed hollow layer between the two electrically conductive layers for the first and second capacitor electrodes.
In accordance with an added mode of the invention, the dielectric is a ferroelectric gel that is applied by spin-on coating. Moreover, the dielectric may also be some other, not necessarily ferroelectric substance that can be applied by the spin-on coating process, namely a substance for the dielectri

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