Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
1998-08-28
2001-05-01
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S693000, C257S698000
Reexamination Certificate
active
06225694
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device, and particularly to a structure of a small-sized area array package.
2. Description of the Related Art
A conventional general small-sized area array package has a structure wherein a semiconductor chip is mounted on a substrate composed of an organic material or a substrate composed of a ceramic material, having wires or interconnections formed by a metal material such as copper foil or tungsten or the like with bumps
2
such as solder, gold or the like interposed therebetween, and external terminals such as solder balls or the like are provided at the lower surface of the substrate in lattice form after a liquid epoxy resin has been charged into an interval or space between the semiconductor chip and the substrate.
SUMMARY OF THE INVENTION
With the foregoing in view, it is therefore an object of the present invention to provide a semiconductor device capable of preventing the radiation of an electromagnetic wave to the outside and a malfunction developed due to an electromagnetic wave sent from the outside.
According to one aspect of this invention, for achieving the above object, there is provided a semiconductor device comprising a substrate having a surface with interconnections formed thereon, a semiconductor element electrically connected to the interconnections and mounted on the substrate, and a conductive cap for covering the semiconductor element electrically connected to a ground potential.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.
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patent: 5490324 (1996-02-01), Newman
patent: 5640048 (1997-06-01), Selna
patent: 5706579 (1998-01-01), Ross
patent: 5717245 (1998-02-01), Pedder
patent: 5763939 (1998-06-01), Yamashita
patent: 5789810 (1998-08-01), Gross et al.
patent: 5898219 (1999-04-01), Barrow
patent: 63-175450 (1988-07-01), None
Clark Jhihan B
Clark Sheila V.
Jones Volentine, LLC
Oki Electric Industry Co, Ltd.
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