Semiconductor processing methods of forming stacked capacitors

Details Semiconductor processing methods of forming stacked capacitors Semiconductor processing methods of forming stacked capacitors

1999-11-18

2001-01-30

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S239000, C438S253000, C438S396000, C438S397000

Reexamination Certificate

active

06180450

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to capacitor formation in semiconductor wafer processing, and to formation of memory cells employing capacitors.
BACKGROUND OF THE INVENTION
As DRAMs increase in memory cell density, there is a continuous challenge to maintain sufficiently high storage capacitance despite decreasing cell area. Additionally, there is a continuing goal to further decrease cell area.
The principal way of increasing cell capacitance is to through cell structure techniques. Such techniques include three-dimensional cell capacitors, such as trenched or stacked capacitors. This invention concerns stacked capacitor cell constructions, including what are commonly known as crown or cylindrical container stacked capacitors, as well as to other stacked capacitor constructions. Aspects of the invention will have specific application in 64 Meg process flows and beyond.


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