Coded modulation for digital storage in analog memory devices

Details Coded modulation for digital storage in analog memory devices Coded modulation for digital storage in analog memory devices

1997-07-22

2001-04-03

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Data formatting to improve error detection correction...

C714S746000

Reexamination Certificate

active

06212654

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to analog memory devices, and more particularly to techniques which utilize coded modulation concepts to implement data storage in an analog memory device.
BACKGROUND OF THE INVENTION
An analog memory device uses a number of different amplitude levels to store more than one bit in a single memory cell. The amplitude level stored in a particular cell corresponds to one of several multi-bit binary values. Conventional analog memory cells do not utilize coding and instead generally use 2
n
voltage levels to store n bits of information. A multi-bit binary value is stored in the cell by storing a voltage level which falls within a range corresponding to that level. For example, a three-bit binary value may be stored in a single cell by storing a particular one of eight voltage levels used to represent one of the eight possible three-bit values.
A significant problem in conventional analog memory devices is that the readout of the voltage level stored in a particular cell is generally corrupted by noise. The noise may cause a stored voltage level falling within a given voltage range to be misread as falling within another voltage range. As a result, conversion of the corrupted readout voltage to a multi-bit binary value may produce the incorrect value. The susceptibility of an analog memory cell to this type of noise-induced readout error generally depends on the size of the voltage ranges assigned to each multi-bit binary value. Since the memory cells are often constrained in practice to operate with commonly-available power supplies, the stored voltage level is typically restricted to be no larger than a certain maximum value. The need to provide an adequate voltage range for each multi-bit binary value in order to avoid noise-induced readout errors, coupled with the practical limitation on maximum cell voltage, places a severe constraint on the number of bits which can be stored in an analog memory cell, and thus on the storage capacity of a conventional analog memory device.
It is therefore apparent that a need exists for a technique which can increase the number of bits which can be stored in a given multi-bit memory cell, or alternatively provide improved readout reliability for a fixed number of stored bits per cell, without increasing the maximum stored voltage supported by the cell.
SUMMARY OF THE INVENTION
The present invention utilizes coded modulation techniques to improve data storage in an analog memory device. The memory device includes a number of analog memory cells, each capable of storing an analog signal in the form of an amplitude level. In one embodiment of the invention, a set of b information bits to be stored is first coded to generate a set of coded bits. The set of coded bits, which as a result of the coding includes more than b bits, is then mapped to one or more levels, and each of the one or more levels is stored in a corresponding one of the analog memory cells. The one or more levels to which a given set of coded bits is mapped may each correspond to a signal in a one-dimensional or multidimensional signal set. In a simple one-dimensional amplitude modulation (AM) pragmatic coding example, the coding operation may involve applying a rate 1/2 convolutional code to i least significant bits, i=1, 2, . . . , of the set of b bits such that the corresponding set of coded bits includes b+i bits. The set of b+i coded bits are then mapped to one of 2
b+i
distinct amplitude levels of a one-dimensional AM signal set. The rate 1/2 code may be implemented with 64, 128 or 256 states, or another suitable number of states. Alternative embodiments of the invention may utilize other types of codes, including, for example, block codes and convolutional codes with rates other than 1/2.
In embodiments of the invention which utilize multidimensional signal sets, the mapped bits may be coded or uncoded. An example of a coded multidimensional embodiment utilizes a two-dimensional quadrature amplitude modulation (QAM) signal set or a two-dimensional AMPM signal set, and a given set of bits is mapped to a particular signal in the two-dimensional signal set. The first and second dimensions of the particular signal are then stored in respective first and second cells of the analog memory device. More generally, a given set of bits may be mapped to a signal in an m-dimensional signal set, with or without coding of the bits, and each of the m dimensions of the selected signal may then be stored as a level in a separate cell of the analog memory device. The mapping may be part of a coded modulation technique, such as trellis coded modulation, for converting a sequence of symbols, each symbol corresponding to a set of information bits, to a sequence of signals from the m-dimensional signal set. The coded modulation technique operates in accordance with predetermined conversion rules which are defined by the particular modulation technique.
An exemplary coded modulation device for use with trellis coded modulation and other coded multidimensional modulation techniques maps a sequence of b-bit symbols to a sequence of signals in an m-dimensional signal set. The first {tilde over (b)} bits of the set of b parallel bits of a given symbol are supplied to a convolutional or block encoder which has a rate of {tilde over (b)}/({tilde over (b)}+1). A total of b+1 bits are then applied to a mapper, and the {tilde over (b)}+1 bits from the encoder are used to select a particular subset of signals in an m-dimensional signal set, while the remaining bits applied to the mapper are used to select a particular signal from the selected subset. Each of the m dimensions of the selected signal are then stored in a separate analog memory cell.
In embodiments in which readout noise is correlated across different cells of the memory device, performance may be improved by interleaving the mapped levels for different sets of coded bits prior to storing the levels in the cells of the memory device. Other embodiments of the invention may utilize combinations of two or more different types of coded or uncoded modulation to store different portions of a given block of information bits. For example, a first set of b bits may be processed using a first type of coded or uncoded modulation, and a second set of b bits processed using a second type of coded or uncoded modulation different than the first type of modulation.
In accordance with another aspect of the invention, a readout unit may be provided for reading stored levels from the memory cells. The readout unit generates a single readout value for a particular stored level using the results of multiple readouts of that stored level. For example, a particular number of multiple readouts may be summed or averaged to provide a more reliable indication of the actual level stored in a given cell. This multiple readout process is particularly useful in applications in which noise corrupting the readout from a given cell is substantially uncorrelated between successive readouts, such that the effects of the noise can in effect be averaged out over multiple readouts. The process can also provide significant signal-to-noise ratio (SNR) gain in applications in which the noise is only partially correlated between successive readouts. The multiple readout feature of the invention is suitable for use with both one-dimensional and multi-dimensional signal sets, and may be used independently of coded modulation to improve readout reliability in both coded and uncoded analog data storage applications.
The present invention provides improved storage in analog memory devices, resulting in higher storage capacity for a given bit error probability or alternatively more reliable storage in terms of bit error rate probability for a given fixed storage capacity. The improvement is achieved in the illustrative embodiments by using an increased number of storage levels in each cell and applying a combination of coding and modulation to information bits to be stored in the cells. For

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