Method of forming titanium silicide

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S783000, C438S714000

Reexamination Certificate

active

06207562

ABSTRACT:

BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a method for forming a titanium silicide during a process for fabricating a semiconductor device.
(b) Description of the Related Art
Silicide is widely used in manufacturing integrated circuit or semiconductor devices because of its low sheet resistance. Generally, in the case of titanium silicide, the silicide is formed by first depositing a titanium thin film using a sputtering process on a silicon wafer where source/drain regions and gate electrodes are formed. The silicon wafer is then heat-treated within an electric furnace or through RTP (rapid thermal processing) to cause the deposited titanium to react with the silicon wafer to form titanium silicide. The sheet resistance of the titanium silicide depends on the titanium thin film depositing conditions rather than the silicide forming heat-treating conditions.
The titanium thin film is usually deposited using the collimate (high power) sputtering method. In this method, metal atoms sputtered from a metal target pass through and are accelerated by a mesh disposed between the metal target and the silicon wafer. This causes the sputtered metal atoms to gain very high kinetic energy which can provide certain process advantages. However, use of the collimate sputtering method causes the metal atoms to be deposited onto the silicon wafer in a vertical direction with respect to the wafer surface. The deposition of the metal atoms in the vertical direction, in turn, causes the deposited titanium thin film to lack uniform film thickness. As a result, the resulting silicide thickness and sheet resistance have poor uniformity.
SUMMARY OF THE INVENTION
The present invention has been made in an effort to solve the above-described problems.
In accordance with the present invention, a method for forming a metal silicide, e.g. titanium silicide, with uniform thickness, low sheet resistance and uniform sheet resistance is provided.
In one embodiment, a titanium silicide is formed on a silicon wafer using the standard (low power) sputtering method (i.e. without causing the metal atoms to have a high kinetic energy as in the collimate sputtering method). The standard sputtering method, commonly used for aluminum metal deposition, generates metal atoms with low kinetic energy from a metal target for deposition on a wafer in random directions, thus providing uniform titanium thin film thickness.
However, one difficulty with depositing the titanium thin film through the standard sputtering method is that, because of the metal atoms' low kinetic energy, the metal atoms cannot readily penetrate the thin native oxide film which naturally exists on the exposed silicon wafer surfaces, e.g. on the surfaces of source/drain regions. (The native oxide film forms as a result of oxidation of the exposed silicon, e.g. from interactions between the exposed silicon and atmospheric oxygen.) Accordingly, the native oxide film functions as a diffusion barrier and interrupts the diffusion between the silicon and the titanium thin film, i.e. inhibits the formation of titanium silicide. This is not a problem in the collimate sputtering method wherein the metal atoms possess high kinetic energy and thus penetrate the native oxide film.
Thus, in accordance with the present invention, the native oxide film is removed, e.g. with a hydrofluoric (HF) acid etch, followed by a degas process to remove impurities, prior to deposition of the titanium thin film. As an example, the degas process is done in a degas chamber with halogen lamp type of heater. The degas process is performed at a relatively low degas temperature, e.g. 100 to 200° C., in contrast to what is commonly prescribed for degas processes. A relatively low degas temperature is used since high degas temperatures can undesirably create a thermal oxide film on the exposed silicon resulting in increased sheet resistance of the titanium silicide for reasons similar to those discussed above in relation to the native oxide film.
In an alternative embodiment, the degas process is not performed after the native oxide film is removed.
In either embodiment, after the native oxide film is removed (and any degas process performed), a titanium thin film is deposited using the standard type sputtering method.
In one embodiment, the titanium thin film is deposited on a silicon wafer which is in thermal equilibrium with a heater block that is set at a temperature of about 200° C. In accordance with this embodiment, the silicon wafer is brought into thermal equilibrium with the heater block by using a conventional convection heating process with an argon gas flow rate of 15 sccm. Once thermal equilibrium between the heater block and silicon wafer is achieved, the titanium is sputtered under the following conditions:
an argon gas flow rate of 25 sccm;
a direct current power of 2 KW; and
a sputtering time of about 23 seconds.
Illustratively, the thickness of the titanium thin film deposited is about 480 Å.
After the titanium thin film is deposited, the silicon wafer is subjected to a rapid thermal process so that diffusion occurs between the titanium thin film and the silicon wafer, thereby forming the titanium silicide. After the rapid thermal process and accompanying formation of titanium silicide, the remaining titanium is removed.
Since a standard sputtering process is used, the resulting titanium silicide in accordance with the present invention has good thickness uniformity and sheet resistance. This is in contrast to the collimate sputtering method where the thickness and sheet resistance of the resulting silicide lacks uniformity as described above.


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C. Y. Chang and S. M. Sze, ULSI Technology, 1996, McGraw-Hill Companies,209-210 and 379-386.*
Stanley Wolf and Richard N. Tauber, Silicon Processing for the VLSI Era vol. 1: Process Technology, 1986, Lattice Press, pg 357-359.

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