Transistor having reverse self-aligned structure

Details Transistor having reverse self-aligned structure Transistor having reverse self-aligned structure

1999-08-16

2001-04-17

Lee, Eddie C. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S288000, C257S382000, C257S383000, C257S384000, C257S388000, C257S413000

Reexamination Certificate

active

06218690

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a field effect transistor (FET) having a reverse self-aligned structure and a method of fabricating the same.
2. Description of the Related Art
As integration increases, semiconductor devices become smaller requiring low resistivity materials to reduce signal delay. Silicide or metal having significantly low resistivity is frequently applied to lower sheet resistance and contact resistance between a gate and a source/drain. In particular, a self-aligned silicide (salicide) process is often used for selectively forming a low resistivity metal silicide film on only a gate electrode and a source/drain region of a transistor without photolithography.
However, when a gate and an active region become smaller with reduced pattern sizes, resistivity of silicide in a gate line increases during the salicide process as shown in FIG.
1
. In an active region, silicide becomes relatively thinner, generating voids by a difference in diffusion speed and a partial stress generated below the spacer formed on the sides of a gate due to a pattern. When a shallow junction is made to reduce a short channel effect due to transistor size reduction, current leakage occurs in a junction layer due to silicide. When the salicide process is performed after a gate line is formed, a defect such as dislocation, is generated on a semiconductor substrate below the edge of a gate thus increasing leakage current. In order to reduce dependence on the gate line size as described above, research has been made into using metal, such as tungsten (W), as a gate formation material.
Accordingly, a need remains for a semiconductor device and a method for fabricating the same that prevents the generation of the above-described defects.
SUMMARY OF THE INVENTION
It is an object of the present invention to overcome the problems associated with prior art semiconductor devices and methods for fabricating the same.
It is another object of the present invention to provide a semiconductor device that facilitates formation of silicide in a fine active region.
It is yet another object of the present invention to provide a semiconductor device having reduced size dependence on the gate line.
It is yet another object of the present invention to provide an appropriate method for fabricating the semiconductor device.
Accordingly, a reverse self-aligned transistor is provided. The reverse self-aligned transistor includes a source formed on an active region of a semiconductor substrate and a drain formed on the active region of the semiconductor substrate, the drain being positioned a predetermined distance from the source. A silicide film is formed on the source and the drain. Insulative film spacers are formed on sidewalls of a trench, the trench being formed by etching the semiconductor substrate between the source and the drain. A gate insulative film is formed on a lower portion of the trench and a metal gate is formed on the gate insulative film between the insulative film spacers. The metal gate is electrically isolated from the source and the drain by the insulative film spacers.
The silicide film is made of a compound of silicon and a material selected from the group consisting of titanium (Ti), cobalt (Co), tantalum (Ta), tungsten (W), a complex film of titanium (Ti) and tungsten (W), and a double film of titanium (Ti) and cobalt (Co). A capping layer made of silicon nitride film having a thickness between about 100 to 1000 Å may be further formed on the silicide film. The capping layer improves a refractory propriety of the silicide.
The gate is formed of tungsten (W) or titanium nitride (TiN). A diffusion preventing film may be further formed for preventing the gate from being diffused into the semiconductor substrate. The diffusion preventing film is formed of tungsten nitride (WN
x
).
A method for fabricating a reverse self-aligned transistor is also provided. The method includes forming a junction region in an active region of a semiconductor substrate, forming a silicide film on a surface of the junction region, and forming an interlayer insulative film on the semiconductor substrate. The method further includes forming a trench through the junction region exposing the semiconductor substrate, forming insulative film spacers on sidewalls of the trench, forming a gate insulative film on a lower portion of the trench, and forming a gate self-aligned to the spacers within the trench.
Forming the junction region includes forming a junction region in an active region of the semiconductor substrate using an impurity injection and diffusion process. Forming a junction region may include thermally processing the resultant structure. Forming the silicide film includes forming the silicide film of a material selected from group consisting of titanium (Ti), cobalt (Co), tantalum (Ta) and tungsten (W), or can be a complex film of titanium (Ti) and tungsten (W), or a double film of titanium (Ti) and cobalt (Co).
The method may further include forming a capping layer on the junction region before forming the interlayer insulative film for improving a refractory property of the silicide film. The capping layer is made of a silicon nitride film having a thickness between about 100 to 1000 Å.
The method may further include forming a diffusion preventing film for preventing the gate from being diffused to the semiconductor substrate. Forming the diffusion preventing film includes forming the diffusion preventing film of titanium nitride (TiN) or tungsten nitride (WN
x
).
Forming the gate includes forming the gate of tungsten (W). Forming the gate includes depositing a metal film on the semiconductor substrate between the spacers and planarizing the metal film. Planarizing the metal film includes planarizing the metal film using a chemical mechanical polishing (CMP) or etch back process, or a process using both chemical mechanical polishing (CMP) and etch back processes.
According to the present invention, a silicide formation process is performed in a wide region of the substrate lacking a pattern such as a gate. Thus, defects are not generated on the semiconductor substrate below the edges of the gate when the silicide reaction occurs. Also, sheet resistivity is reduced because the gate is formed of metal thereby reducing dependence on gate pattern size.


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