Semiconductor devices with pocket implant and counter doping

Details Semiconductor devices with pocket implant and counter doping Semiconductor devices with pocket implant and counter doping

1999-03-30

2001-05-08

Booth, Richard (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S291000, C438S301000

Reexamination Certificate

active

06228725

ABSTRACT:

BACKGROUND OF THE INVENTION
Portable personal electronic devices such as cellular telephones, notebook computers, and other peripheral equipment have become increasingly popular for consumers. The current technological challenge in building portable battery-operated equipment is to drastically reduce the power consumption and thus prolong battery life, and still maintain reasonable speed performance. The low standby power demands of CMOS makes it especially suited for this application. Although reducing the power supply voltage, V
DD
, to
1
V or below is very effective in reducing power consumption, it also lowers the speed performance. To lower the supply voltage and still maintain operational speed, the threshold voltage of the transistor, V
T
, must also be lowered. The threshold voltage can be reduced by using a lower substrate impurity concentration. However, this increases the undesirable short channel effect in submicron devices. Therefore, it may be seen that the design of a submicron transistor for low power supply voltage operations is non-trivial.
SUMMARY OF THE INVENTION
Accordingly, there is a need for a low power submicron transistor structure that provides low V
T
, reduced short channel effect, and good speed performance.
In accordance with the present invention, a low threshold voltage transistor with improved performance is provided which eliminates or substantially reduces the disadvantages associated with prior transistor devices.
In one aspect of the invention, a transistor is formed in a face of a semiconductor. The transistor includes source and drain regions formed in the face of the semiconductor layer with a gate insulatively disposed adjacent the face of the semiconductor layer and between the source and drain regions. A layer of counter doping is introduced in and near the face of the semiconductor layer generally between the source and drain regions. Two pocket implants may also be formed generally adjacent to the source and/or drain regions and the counter doped layer.
In another aspect of the invention, a method of manufacturing a transistor is provided. The transistor is formed in a face of a semiconductor layer having a first conductivity type is provided. The method includes the steps of selectively implanting a shallow layer of impurities of a second conductivity type adjacent to the face of the semiconductor layer and forming pockets of impurities of the first conductivity type generally adjacent to the source and drain regions below the gate. The pockets may also be formed closer to the face of the semiconductor layer with the layer of counter doping therebetween.
In yet another aspect of the invention, a transistor structure includes a surface counter doping layer of the second impurity type formed generally between the drain and source regions, and pocket implants of the first impurity type formed generally adjacent and/or below the counter doping layer.
Technical advantages of the instant invention include a submission transistor structure that has low threshold voltage satisfying the need for high performance at lower power supply voltages for portable electronic equipment. The instant transistor structure(s) satisfies this need with a reduced short channel effect which in turn minimizes the sensitivity of transistor performance to gate length variation at shorter channel lengths.


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