Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Polycrystalline semiconductor
Reexamination Certificate
1999-05-17
2001-07-03
Dang, Trung (Department: 2823)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
Polycrystalline semiconductor
C438S490000, C148SDIG001
Reexamination Certificate
active
06255200
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to processes utilized in semiconductor device manufacturing. In particular, the present invention relates to a process for depositing polycrystalline silicon, especially for forming CMOS devices. The present invention also relates to CMOS device formed according to the method.
BACKGROUND OF THE INVENTION
Chemical vapor deposition (CVD) techniques are utilized in a variety of applications in semiconductor processing operations. Control of CVD processes is becoming increasingly important as semiconductor device sizes decrease and device density increases. It is increasingly being found that small variations in one or more CVD process parameters can translate into physical and operational differences in structures being created by the processes. Additionally, even small differences in resulting structure, which may result from small differences in process parameters can adversely effect or conversely positively effect the final device structure and operation. In fact, even small operational differences can be important.
SUMMARY OF THE INVENTION
The present invention provides a process for depositing polycrystalline silicon. The process includes exposing a semiconductor substrate on which the polycrystalline silicon is to be deposited to a silicon containing gas at a temperature of about 680° C. to about 800° C.
The present invention also provides a semiconductor device formed according to the process.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.
REFERENCES:
patent: 3899373 (1975-08-01), Antipov
patent: 4503807 (1985-03-01), Nakayama et al.
patent: 4882299 (1989-11-01), Freeman et al.
patent: 4963506 (1990-10-01), Liaw et al.
patent: 5089432 (1992-02-01), Yoo
patent: 5132237 (1992-07-01), Matthews
patent: 5261960 (1993-11-01), Ozias
patent: 5525157 (1996-06-01), Hawkins et al.
patent: 5552017 (1996-09-01), Jang et al.
patent: 5567476 (1996-10-01), Law et al.
patent: 5587338 (1996-12-01), Tseng
patent: 5607724 (1997-03-01), Beinglass et al.
patent: 5652166 (1997-07-01), Sun et al.
patent: 5668035 (1997-09-01), Fang et al.
patent: 5783469 (1998-07-01), Gardner et al.
patent: 5998270 (1999-12-01), Gilmer et al.
Wolf, “Silicon Processing For The VLSI Era”, vol. 1,Lattice Press,pp 166-174, 1986.
Ballantine Arne W.
Chan Kevin K.
Langdeau Gary L.
Rice Michael B.
Connolly Bove Lodge & Hutz
Dang Trung
International Business Machines - Corporation
Sabo William D.
LandOfFree
Polysilicon structure and process for improving CMOS device... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Polysilicon structure and process for improving CMOS device..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Polysilicon structure and process for improving CMOS device... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2502082