Method for reducing surface charge on semiconductor wafers...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S016000, C438S649000, C438S655000, C438S675000, C438S710000

Reexamination Certificate

active

06258718

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates in general to the fabrication of semiconductor wafers, and, more particularly, to a method of reducing static electric charges on the surface of wafers resulting from plasma deposition.
Semiconductor processing requires the deposition of conductive materials on semiconductor wafers. Typically, plasma deposition, in the form of physical vapor deposition (PVD) or plasma enhanced chemical vapor deposition (PECVD), is used to deposit the conductive material on the semiconductor wafer as processing temperatures are significantly lower than non-plasma deposition methods. Plasma deposition is carried out in a plasma chamber with the wafer being secured on top of a wafer platform. Typically, the wafer is physically secured to the wafer platform by a clamping ring which engages an outer portion of the top surface of the wafer. The wafer platform is typically conductive so that the bottom surface of the wafer is electrically coupled to the wafer platform. The clamping ring is electrically coupled to the wafer platform such that the top surface of the wafer is also electrically coupled to the wafer platform.
An electrical bias is then applied to the wafer platform in order to control the plasma deposition process. The electrical bias sets up a negative potential on the wafer to attract the positive ions from the plasma. The topology of the formed layer is controlled by adjusting the applied electrical bias. Typically, the conductive material is applied over a layer of insulating material in order to form desired contacts, interconnects, or the like. While the clamping ring is electrically coupled to the wafer platform, the top surface of the wafer is not shorted to the wafer platform as the top surface of the wafer is insulated by the layer of insulating material. Once the plasma is generated, the top surface of the wafer is continually charged as the conductive material is deposited thereby forming a potential difference between the bottom surface of the wafer and the top surface of the wafer. This potential difference may lead to arcing through the wafer causing damage to one or more dies on the wafer.
Accordingly, there is a need for a process of depositing conductive materials over an insulating layer in which the risk of arcing through the wafer is reduced. Preferably, such a process would be inexpensive, easy to implement, would not entail excess processing steps, and would not adversely affect the quality of the deposited conductive layer.
SUMMARY OF THE INVENTION
The present invention meets this need by providing a method in which an initial layer of conductive material is deposited over the insulating layer prior to electrically biasing the wafer platform. The initial layer is preferably continuous so that the top surface of the wafer contacts the clamping ring, thereby, shorting the top surface to the wafer platform. Once the initial layer of conductive material is formed, the wafer platform is electrically biased to control the growth of the rest of the conductive layer. The present invention also meets this need by providing a method in which the wafer platform is exposed to the plasma so as to reduce the potential difference between the top and bottom surfaces of the wafer.
According to a first aspect of the present invention, a process of applying conductive material over a layer of insulating material on a semiconductor wafer in which a bottom surface of the wafer is electrically coupled to a wafer platform comprises forming a first layer of the conductive material over the insulating layer, the first layer of conductive material electrically coupling a top surface of the wafer to the wafer platform. The wafer platform is then electrically biased to a predetermined potential. A second layer of the conductive material is then formed over the first layer of conductive material. The conductive material may comprise a metallic material, such as a refractory metal, or semiconductor material. The first layer may have a thickness of at least 50 Angstroms and preferably, a thickness ranging from about 100 Angstroms to about 200 Angstroms. The insulating layer may be electrically coupled to the wafer platform by a clamping ring coupled to a portion of a top surface of the insulating layer and the wafer platform. The clamping ring is preferably electrically and physically coupled to the wafer platform. A portion of a top surface of the wafer platform may be substantially covered by the wafer and the clamping ring.
According to another aspect of the present invention, a process of applying conductive material over a layer of insulating material on a semiconductor wafer in which a bottom surface of the wafer is electrically coupled to a wafer platform comprises exposing the wafer to a plasma including a conductive material. A substantially continuous first layer of the conductive material is formed over the insulating layer, the first layer of conductive. material electrically coupling a top surface of the wafer to the wafer platform. The wafer platform is electrically biased to a predetermined potential, and a second layer of the conductive material is then formed over the first layer of conductive material. The step of exposing the wafer to a plasma including a conductive material may comprise the step of exposing a portion of the wafer platform to the plasma.
According to yet another aspect of the present invention, a process of applying conductive material over a layer of insulating material on a semiconductor wafer in which a bottom surface of the wafer is electrically coupled to a wafer platform comprises exposing the wafer to a plasma including a conductive material. A first layer of the conductive material is formed over the insulating layer until a top surface of the wafer is electrically coupled to the wafer platform. The wafer platform is electrically biased to a predetermined potential and a second layer of the conductive material is then formed over the first layer of conductive material.
According to a further aspect of the present invention, a process of applying conductive material over a layer of insulating material on a semiconductor wafer comprises positioning the wafer on a wafer platform such that a portion of a top surface of the wafer platform is exposed and a bottom surface of the wafer is electrically coupled to the wafer platform. The wafer and the wafer platform are exposed to a plasma including a conductive material to form a first layer of conductive material over the layer of insulating material on the wafer surface. The wafer platform is electrically biased to the wafer platform to a predetermined potential, and a second layer of the conductive material is then formed over the first layer of conductive material. The process may further comprise the step of securing the wafer to the wafer platform using a clamping ring engaging a portion of a top surface of the layer of insulating material. The process may further comprise the step of electrically coupling the clamping ring to the wafer platform.
According to a still further aspect of the present invention, a process of forming conductive material on a layer of insulating material on a semiconductor wafer comprises positioning the wafer on a wafer platform such that a bottom surface of the wafer is electrically coupled to the wafer platform. The wafer is secured to the wafer platform using a clamping ring engaging a portion of a top surface of the layer of insulating material. The clamping ring is then electrically coupled to the wafer platform. The wafer is exposed to a plasma including the conductive material and a first layer of the conductive material of at least 100 Angstroms is formed over the layer of insulating material. The first layer contacts the clamping ring such that a top surface of the wafer is electrically coupled to the wafer platform through the clamping ring. The wafer platform is then electrically biased to a predetermined potential, and a second layer of the conductive material is formed over first layer of the conductive mat

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