Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Utility Patent
1998-07-29
2001-01-02
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S595000, C438S585000, C438S589000, C438S591000, C438S305000, C438S197000
Utility Patent
active
06169006
ABSTRACT:
FIELD OF THE INVENTION
The present invention is directed generally to spacers for semiconductor devices and, more particularly, to semiconductor devices having grown oxide spacers and methods of forming such devices.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG.
1
. The device generally includes a semiconductor substrate
101
on which a gate electrode
103
is disposed. The gate electrode
103
is typically a heavily doped conductor having uniform conductivity. An input signal is typically applied to the gate electrode
103
via a gate terminal (not shown). Heavily doped source/drain regions
105
are formed in the semiconductor substrate
101
and are connected to source/drain terminals (not shown). As illustrated in
FIG. 1
, the typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain depends on the respective applied voltages and the type of device being made (e.g., PMOS, NMOS, etc.).
A channel region
107
is formed in the semiconductor substrate
101
beneath the gate electrode
103
and separates the source/drain regions
105
. The channel is typically lightly doped with a dopant type opposite to that of the source/drain regions
105
. The gate electrode
103
is generally separated from the semiconductor substrate
101
by an insulating layer
109
, typically an oxide layer such as SiO
2
. The insulating layer
109
is provided to prevent current from flowing between the gate electrode
103
and the source/drain regions
105
or channel region
107
. Spacers
113
are generally formed on sidewalls of the gate electrode
103
and silicidation layers
111
are formed over the source/drain regions
105
. The spacers
113
play an important role in semiconductor devices. The spacers
113
separate the silicidation layer
111
over the source/drain regions
105
from the silicidation layer
111
on the gate electrode
103
. Without the spacers
113
, conventionally formed silicidation layers would short the source/drain regions
105
and the gate electrode
103
. The spacers
113
also play an important role in the formation of the source/drain regions
108
. For example, spacers
113
are commonly used to space implants from the gate electrode
103
.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage is applied to the gate electrode
103
, a transverse electric field is set up in the channel region
107
. By varying the transverse electric field, it is possible to modulate the conductance of the channel region
107
between the source region and the drain region. In this manner an electric field controls the current flow through the channel region
107
. This type of device is commonly referred to as a MOS field-effect-transistor (MOSFET).
Semiconductor devices, like the one described above, are used in large numbers to construct most modern electronic devices. As a larger number of such devices are integrated into a single silicon wafer, improved performance and capabilities of electronic devices can be achieved. In order to increase the number of semiconductor devices which may be formed on a given surface area of a substrate, the semiconductor devices must be scaled down (i.e., made smaller). This is accomplished by reducing the lateral as well as vertical dimensions of the device structure. In scaling down the semiconductor devices, the spacers must also be controllably scaled down.
SUMMARY OF THE INVENTION
The present invention generally provides a semiconductor device having grown oxide spacers and a method for manufacturing such a semiconductor device. The spacers may be formed by oxidation using an oxidation-resistant layer which improves the reliability of the device.
In one embodiment of the invention, a gate electrode is formed over a substrate, and an oxidation-resistant layer is formed adjacent to the gate electrode. The gate electrode is then oxidized to form an oxide layer extending over the oxidation-resistant layer. One or more spacers is then formed adjacent to the gate electrode using the oxide layer.
The above summary of the present invention is not intended to describe each embodiment or every implementation of the present invention. The Figures and the detailed description which follow more particularly exemplify these embodiments.
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Fulford H. Jim
Gardner Mark I.
May Charles E.
Advanced Micro Devices , Inc.
Smith Matthew
Yevsikov Victor
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