Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-07-02
2001-01-23
Bowers, Charles (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S687000, C438S618000, C438S622000, C438S637000, C438S643000, C438S640000
Reexamination Certificate
active
06177347
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to a method of metallization in the fabrication of integrated circuits, and more particularly, to a method of cleaning the contact hole before metallization in the manufacture of integrated circuits.
(2) Description of the Prior Art
In a common application for integrated circuit fabrication, a contact/via opening is etched through an insulating layer to an underlying conductive area to which electrical contact is to be made. A barrier layer, typically titanium nitride, is formed within the contact/via opening. A conducting layer material, typically tungsten, is deposited within the contact/via opening. As device sizes continue to shrink, these typical materials are no longer adequate. Because of its lower bulk resistivity, Copper (Cu) metallization is the future technology for feature sizes in the deep sub-half-micron regime. Cu has been used successfully as an interconnection line. The damascene or dual damascene process has become a future trend especially on the copper metallization process because of the difficulty in metal etching. These processes are discussed in
ULSI Technology,
by Chang and Sze, The McGraw Hill Companies, Inc., NY, N.Y., c. 1996, pp. 444-445. When a connection is to be made to an underlying copper interconnection line, the copper exposed within the contact opening easily oxidizes. It is necessary to remove this copper oxide as well as polymer residues from the contact opening before metallization.
U.S. Pat. No. 5,200,360 to Bradbury et al teaches an Ar sputter etch for one minute to remove inorganic material from the bottom of a contact opening and an oxygen plasma descum for 15 seconds to remove polymer residue. U.S. Pat. No. 5,460,689 to Raaijmakers et al teaches an Ar sputter etch at high and low pressure wherein the corners of the contact opening are rounded. U.S. Pat. No. 5,670,421 to Nishitani et al teaches Ar sputtering and a Cl
2
plasma or N
2
treatment. U.S. Pat. No. 5,736,458 to Teng teaches an Ar sputter clean, barrier layer deposition, and then an N
2
treatment before metal deposition.
SUMMARY OF THE INVENTION
A principal object of the present invention is to provide an effective and very manufacturable method of copper metallization in the fabrication of integrated circuit devices.
Another object of the invention is to provide a method of copper metallization having low via resistance.
A further object of the invention is to clean the via opening before copper metallization in the fabrication of integrated circuits.
Yet another object of the invention is to provide an in-situ cleaning process before copper metallization.
Yet another object of the invention is to provide an in-situ sputtered and H
2
/He reactive cleaning process before barrier layer deposition in a copper metallization process.
A still further object is to clean the surface of a copper pad before depositing a wiring layer.
Another object of the invention is to clean the surface of a copper pad using a plasma clean before depositing a wiring layer.
In accordance with the objects of this invention a new method of in-situ cleaning in a copper metallization process is achieved. A copper line is provided overlying a first insulating layer on a semiconductor substrate. A silicon nitride layer is deposited overlying the copper line. A second insulating layer is deposited overlying the silicon nitride layer. A via is opened through the second insulating layer to the silicon nitride layer wherein a polymer forms on the sidewalls of the via. The silicon nitride layer within the via is removed wherein the copper line underlying the silicon nitride layer is exposed within the via and whereby the exposed copper line is oxidized forming a copper oxide layer within the via. The via is cleaned within a deposition chamber wherein the cleaning comprises the following steps: first sputtering Argon into the via to remove the polymer, second pumping down the deposition chamber, and third flowing H
2
and He gases into the via to reduce the copper oxide layer to copper. Thereafter, a barrier metal layer is deposited onto the third insulating layer and within the via using the same deposition chamber and maintaining vacuum. A copper layer is formed within the via overlying the barrier metal layer to complete the copper metallization in the fabrication of an integrated circuit device.
Also in accordance with the objects of this invention, a new method of cleaning the surface of a copper pad using a plasma clean before depositing a wiring layer is achieved. A copper pad is provided overlying a first insulating layer on a semiconductor substrate. A passivation layer is deposited overlying the copper pad. A via is opened through the passivation layer to the copper pad whereby the copper pad is oxidized forming a copper oxide layer within the via. The via is cleaned within a deposition chamber wherein the copper oxide layer is removed. Thereafter, a barrier metal layer is deposited, using the same deposition chamber, onto the passivation layer and within the via. A wiring layer is formed within the via overlying the barrier metal layer to complete fabrication of the integrated circuit device.
REFERENCES:
patent: 4980034 (1990-12-01), Wolfson et al.
patent: 5200360 (1993-04-01), Bradburg et al.
patent: 5460689 (1995-10-01), Raaijmakers et al.
patent: 5670421 (1997-09-01), Nishitani et al.
patent: 5736458 (1998-04-01), Teng
patent: 5863446 (1999-01-01), Hanson
patent: 5939788 (1999-08-01), McTeer
patent: 5985762 (1999-11-01), Geffken et al.
patent: 6037250 (2000-03-01), Matsubara
patent: 6066892 (2000-05-01), Ding et al.
patent: 6100190 (2000-08-01), Kobori
Chang et al., “ULSI Technology”, The McGraw-Hill Companies, Inc., New York, c.1996, pp. 444-445.
Liu Chung-Shi
Shue Shau-Lin
Yu Chen-Hua
Ackerman Stephen B.
Bowers Charles
Nguyen Thanh
Pike Rosemary L. S.
Saile George O.
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