Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-09-02
2001-06-26
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S612000, C257S779000
Reexamination Certificate
active
06251766
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to a method and structure for adhering a semiconductor chip to a supporting substrate. In particular, the present invention describes a method and structure for improving the integrity of ball grid array (BGA) modules and flip chips mounted on printed circuit boards and chip carriers.
BACKGROUND OF THE INVENTION
Solder ball connections have been proven very successful for electrically connecting a semiconductor chip to a supporting substrate. Because a substrate surface is solder non-wettable, a solder ball, typically made of Pb/Sn (lead/tin) solder, does not bond to the substrate surface directly. Hence, an intermediate pad structure is preferably used between the two surfaces to facilitate adhesion. U.S. Pat. No. 5,027,188 issued to Owada et al. shows a semiconductor integrated circuit device and, more particularly, a technique which is useful when applied to a semiconductor integrated circuit device of a so-called “flip-chip” system in which a semiconductor chip is mounted to a substrate through solder bumps.
More specifically, area array packages or ball grid array (BGA) modules, including such modules as ceramic ball grid array (CBGA) modules and tape ball grid array (TBGA) modules, typically have 90/10 weight percent Pb/Sn solder balls on the underside of the package. These solder balls are connected to adhesion pads, typically copper (Cu) pads, residing on a printed circuit board (PCB) by reflowing 63/37 Pb/Sn eutectic solder paste.
FIG. 1
shows an adhesion pad
15
interposed between a supporting substrate
5
, such as a printed circuit board (PCB), and a solder ball
25
of, for example, a Pb/Sn alloy. A eutectic solder
20
, for example, Pb/Sn, is reflowed to join the solder ball
25
to the adhesion pad
15
.
FIGS. 2A-2C
show additional views of the prior art.
FIG. 2A
shows a prior art PCB footprint for BGA packages, with a flat Cu joining or adhesion pad
10
. The pad
10
has an associated via
11
, connected to the pad
10
through a dogbone, which is covered with solder mask dam
12
. Solder mask dam
12
prevents eutectic solder from entering into the via
11
when the BGA package is attached to the PCB.
FIG. 2B
shows a cross-section
2
B—
2
B through the adhesion pad
10
of
FIG. 2A. A
typical thickness of PCB adhesion pad
10
is 38-64 &mgr;m (0.0015-0.0025 inches) with a width or diameter of 610-762 &mgr;m (0.024-0.030 inches).
FIG. 2C
shows a cross-section
2
C—
2
C through the joining pad
10
and via
11
of
FIG. 2A
mounted on a circuit board
14
.
CBGA modules are typically the least reliable of all BGA modules. Reliability issues limit the size of CBGA modules to about 32 mm (1.26 inches). Prior art reliability enhancements reside on the module side of the assembly as opposed to the board side. Possible alternatives to improving reliability involve the use of a ceramic column grid array (CCGA), TBGA, or plastic BGA (PBGA) module; each of these modules has its own drawbacks. CCGA modules are susceptible to damage and have a high profile, TBGA modules have still not been established in the industry, and PBGA modules are moisture sensitive.
For ball grid array packages, the package-to-circuit board second level attachment reliability is limited by thermal fatigue which causes a crack to be initiated and propagated at the circuit board side of the solder joint, ultimately leading to complete fracture and an electrical open.
Reliability testing by accelerated thermal cycles (ATC) and mechanical deflection stress (MDS) shows that the module-to-PCB solder joints ultimately fail by a crack growth mechanism, as shown in FIG.
3
.
FIG. 3
shows a typical BGA
30
-to-PCB
32
solder joint, similar to that shown in
FIG. 1
, after the solder joint has failed due to thermal fatigue. Fatigue crack
34
is observed to have traversed through the solder joint in the X-Y plane. Failure occurs at the supporting substrate side (the PCB
32
side) of the solder joints. The crack
34
is initiated just above the Cu pad
33
, close to the Cu-Sn intermetallic layer, and the crack
34
then propagates in the X-Y plane, eventually separating the solder joint from the pad
33
and resulting in an electrical open. The crack
34
grows in the X-Y plane because the strain resulting from the differential expansion (and contraction) of the BGA module
30
and PCB
32
is largest in the X-Y plane. In other words, the crack
34
grows in a plane parallel to the Cu pad
33
. Also, the crack lies close to the intermetallic layer.
The crack does not propagate in the vertical or Z-direction because the strain is relatively small in that direction. The length of time (or the number of thermal cycles) needed for the crack to grow and cause separation of the joint is inversely proportional to the magnitude of the strain and directly proportional to the area (or diameter) of the PCB pad.
The limited thermal fatigue life of CBGA and TBGA packages, in particular CBGA packages, has restricted their range of application. It has also restricted the size of the area array and the number of functional input/outputs (I/O's) because the magnitude of the maximum strain increases proportionally with the body size. The maxima in strain occur at the comer joints, because strain is proportional to the distance from the neutral point (DNP). Increasing array size means that the DNP of the corner joints increases and causes them to fail sooner than for a smaller size module.
In particular, due to the gross mismatch of the coefficient of thermal expansion (CTE) of a ceramic body compared to a PCB, the CBGA package has only moderate reliability. Although the CBGA package is otherwise robust and possesses many advantages, its limited second level attachment reliability restricts its range of application. If attachment reliability is improved, the range of application would be expanded and also the number of useable I/O's and the size of the package could be increased from the present maximum size of 32 mm (1.26 inches). For the TBGA package, if the attachment reliability is improved, then either the body size could be increased or the pitch of the array could be decreased by providing a smaller PCB pad. In both of these cases, the number of I/O's would increase.
A prior structure used to bond a chip to a PCB includes grooves being formed in the top of the PCB, then metallizing with metal pad sidewall angles of 45 degrees. Another process forms a stepped Cu/Sn pad by subtractive etching around a Pb/Sn solder that is used as a mask, such that a step is formed around the pad. Another process uses a plurality of cavities formed in a plastic chip holder, with the cavities being metallized with chromium/copper (Cr/Cu). Another process includes forming a cavity in a substrate and then creating a stepped pad formation using composite metal sidewalls at angles of 45 degrees. The prior art is directed to reducing edge stress, however, and not to the reduction of crack propagation in the X-Y direction.
Although the art of semiconductor chip to supporting substrate connections is well developed, there remain some problems inherent in this technology. One particular problem is the formation of a crack at the circuit board side of the solder joint caused by thermal fatigue. Therefore, a need exists for a method and structure for increasing the reliability of the connection between an area array package and a supporting substrate.
SUMMARY OF THE INVENTION
The present invention provides a method and structure for increasing the reliability of the connection between an area array package and a supporting substrate by altering the propagation direction of a crack that resides above an intermediate adhesion or joining pad structure.
In the present invention, a step or slope is incorporated into the intermediate pad structure. Because BGA failures occur by a crack being initiated just above the copper pad, close to the Cu—Sn intermetallic layer, and propagating in the X-Y plane, the step forces the crack to move in the Z-direction, thereby slo
Desai Kishor V.
Sarkhel Amit K.
Berezny Nema
Bowers Charles
Fraley, Esq. Lawrence R.
International Business Machines - Corporation
Ratner & Prestia
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