Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1996-09-26
2001-04-10
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000
Reexamination Certificate
active
06214684
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, to a semiconductor device having a non-monocrystalline semiconductor layer represented by an amorphous silicon, and a method of manufacturing the same.
2. Related Background Art
In a conventional image information processing apparatus such as a facsimile or an image reader, a photosensor is used as a photoelectric converter. In particular, in recent years, a high-sensitive image reading apparatus having a long line sensor obtained by one-dimensionally arranging photosensors using a hydrogenated amorphous silicon as a photoelectric conversion layer is proposed. Further, a reading apparatus in which photosensors are two-dimensionally arranged in a large area, and a high-performance image reading apparatus in which thin-film transistors or shift resisters are formed on the same substrate by using a hydrogenated amorphous silicon are provided. In particular, in recent years, liquid crystal display apparatuses which are driven by thin-film transistors using a hydrogenated amorphous silicon to cope with large screens are actively developed and manufactured.
FIG. 1
shows an example of an element arrangement of a one-dimensional image reading apparatus. Referring to
FIG. 1
, reference symbol SR
1
is a shift resister; S
1
, a photosensor portion; C
1
, a capacitor portion for accumulating charges; TFT
1
, a transfer TFT for transferring accumulated charges; and Sig MTX
1
, a signal line matrix wiring for outputting the transferred charges out of the circuit. A one-dimensional image reading apparatus is constituted such that such elements are arranged at 1,728 bits in A-B direction for, e.g., A4 size. Note that reference symbols &phgr;1 and &phgr;2 denote block lines, and reference symbol V
DD
denotes a power supply.
FIG. 2
shows an example of a sensor portion of an image reading apparatus as a C-D section of the element arrangement shown in FIG.
1
.
FIG. 2
shows only the photosensor portion S
1
. A gate electrode
2
is formed on a transparent insulating substrate
1
, and an insulating layer
3
consisting of SiO
2
, SiN
x
, or the like, a semiconductor layer
4
consisting of an amorphous silicon, a doping semiconductor layer
5
such as an n
+
-type amorphous silicon, and a main electrode
6
are formed on the gate electrode
2
by patterning as needed. Reference numeral
18
denotes an anti-abrasion thin glass, having a thickness of, e.g., 50 &mgr;m, for preventing abrasion of an image reading element by an original surface; and
17
, a surface of the element. The surface
17
is constituted by a layer which serves as a protective layer as needed and consists of SiN, and a polyimide resin, and an epoxy resin for adhering the anti-abrasion thin glass
18
. In this arrangement, light rays
20
emitting from a light source
22
such as an LED pass through an illumination transmission window
21
of the transparent insulating substrate
1
and are reflected by the original surface
19
. The reflected light rays are incident on the TFT photosensor portion S
1
. The photosensor portion S
1
generates a light output depending on the intensity of the reflected light rays as an electric signal, so that an image can be processed with gradation.
FIGS. 3
to
5
show examples of the arrangement of a thin-film transistor. Referring to
FIG. 3
, a transparent or opaque conductive layer is patterned on the transparent insulating substrate
1
to form the gate electrode
2
, and the insulating layer
3
consisting of SiO
2
or SiN
x
, the semiconductor layer
4
consisting of an amorphous silicon, and the doping semiconductor layer
5
are formed on the gate electrode
2
by patterning as needed. A discrete electrode
7
and the main electrode
6
are formed by patterning.
FIG. 4
shows an example wherein a channel protective layer
8
is formed on the semiconductor layer
4
in FIG.
3
.
FIG. 5
shows the following example. That is, a light-shielding layer
9
and an insulating layer
10
are formed on the transparent insulating substrate
1
by patterning as needed, and the discrete electrode
7
is formed on the resultant structure by patterning. The main electrode
6
and the doping semiconductor layer
5
are formed with a gap by patterning, and the semiconductor layer
4
and the insulating layer
3
are sequentially formed on the gap. The gate electrode
2
is formed on the resultant structure by patterning.
A large-area two-dimensional sensor driven by a thin film transistor using a silicon has developed.
FIG. 6
is a typical sectional view showing a large-area two-dimensional sensor, corresponding to one pixel, for an apparatus for detecting an electromagnetic wave including radiation such as X-rays or light rays. Referring to
FIG. 6
, a thin-film transistor (T
11
) having an electrode
62
serving as a gate electrode, an insulating layer
63
serving as a gate insulating layer, a hydrogenated amorphous silicon semiconductor layer
64
, a doping semiconductor layer
65
, and an electrode serving as a main electrode, an MIS photosensor (S
11
) having the electrode
62
serving as a lower electrode, the insulating layer
63
, the hydrogenated amorphous silicon semiconductor layer
64
, and the doping semiconductor layer
65
, and a capacitor (C
11
) having the electrode
62
serving as a lower electrode, the insulating layer
63
, the hydrogenated amorphous silicon semiconductor layer
64
, the doping semiconductor layer
65
, and the electrode
66
serving as an upper electrode are parallelly arranged and formed on an insulating substrate
61
to constitute one pixel.
Such pixels are arranged in a two-dimensional large area, and a protective layer
68
, consisting of SiN., for protecting the respective pixels and a phosphor
69
for converting the incident radiation such as X-rays into visible light rays are formed on the pixels, thereby constituting a so-called radiation detecting apparatus which copes with a large area.
However, the apparatus with the above arrangement has the following points to be improved.
In the arrangement shown in
FIG. 3
, the doping semiconductor layer
5
formed in a gap K in
FIG. 3
must be removed by etching to a channel of a thin-film transistor after the doping semiconductor layer
5
or/and the main electrode
6
are formed. At this time, a dopant contained in the doping semiconductor layer
5
, e.g., phosphorus atoms, are partially diffused in the semiconductor layer
4
in formation of the doping semiconductor layer
5
. For this reason, the diffused layer must be also removed at the same time. In this case, in particular, if the transparent insulating substrate
1
has a large area, the end point of slight etching of the semiconductor layer
4
cannot be determined. For this reason, a disadvantage that the semiconductor layer
4
is over-etched or etched with poor uniformity may be posed. As a result, the characteristics of the thin-film transistor, especially, a voltage V
th
and a variation thereof, the value of electron mobility and a variation thereof, and a V
th
shift in an operation reliability test and a variation thereof may become worse. In addition, although no t shown, upon completion of the step of finally protecting the structure with a passivation film, the surface of the semiconductor layer
4
is temporarily exposed to the atmospheric air. Due to this influence, the above problems may become worse, or a change in temperature characteristics may disadvantageously vary.
In contrast to this, in the arrangement shown in
FIG. 4
, the above problems can be regulated. The number of masks used in the steps in manufacturing the arrangement in
FIG. 4
is larger than that in FIG.
3
. The thin-film transistor in
FIG. 4
cannot be easily manufactured at a cost lower than that of the thin-film transistor in FIG.
3
.
In the arrangement shown in
FIG. 5
, since the semiconductor layer
4
is formed after the main electrode
6
and the doping semiconductor layer
Bowers Charles
Canon Kabushiki Kaisha
Fitzpatrick ,Cella, Harper & Scinto
Pert Evan
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