Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-05-12
2001-07-10
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000
Reexamination Certificate
active
06258670
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor device fabrication, and more particularly, to a method for forming a high-voltage device having high breakdown voltage and a one-sided gate structure.
2. Description of the Prior Art
As the scale of integrated circuits (ICs) has been rapidly decreased, the short channel effect and the hot carrier problem make the design of the ICs more difficult, if not impossible. Therefore, some methods such as lightly-doped drain (LDD) process were disclosed to solve these problems. However, none of these methods solves energy loss and heat dissipation problems.
FIG. 1
shows the cross-section of a conventional complementary metal oxide semiconductor (CMOS) transistor, which usually includes a p-type substrate
10
, field oxide regions
4
, an n+ source region
2
, an n+ drain region
2
A, a gate region
3
, and an oxide layer
5
.
In the structure of the shown transistor, especially of a high-voltage CMOS transistor, the carriers are apt to drift into the substrate
10
, disadvantageously incurring bipolar effect. Furthermore, as the length of the channel is decreased, the hot electron effect occurs in addition to the decline of threshold voltage, totally affecting the normal function of the transistors.
Referring back to
FIG. 1
, it is noted that the traditional high-voltage CMOS transistor includes two-sided field oxide regions
4
, which are primarily used to improve the breakdown voltage. Unfortunately, this two-sided field oxide structure decreases driving capability of current. Furthermore, this structure results in an unwanted lateral bipolar junction, reducing its snap-back voltage. Moreover, the area occupied by the two-sided field oxide regions disadvantageously consumes more chip area, making high integration of the circuits impossible. For the foregoing reasons, there is a need for a method of fabricating a semiconductor device having high breakdown voltage while maintaining its current driving capability.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method is provided for forming a high-voltage complementary metal oxide semiconductor (CMOS) transistor whose breakdown voltage is substantially improved. In one embodiment, a semiconductor substrate is provided, followed by formation of an oxide layer on the substrate. Next, ions are firstly implanted into the substrate and are driven in to form a well having a first conductivity type in the substrate. Ions are then secondly implanted into the substrate, and are then driven in to form a first sub-well having a first conductivity type and a second sub-well having a second conductivity type contrary to the first conductivity type, wherein both the first sub-well and the second sub-well are located inside the well. After removing the oxide layer, a pad oxide layer and a silicon nitride layer are formed over the substrate. A drift region is defined and formed over the silicon nitride layer, in which a substantial portion of the drift region abuts the second sub-well. Subsequently, a field oxide region is formed on the drift region, followed by removal of the silicon nitride layer and the pad oxide layer. Finally, a polysilicon gate region is formed over the substrate such that a portion of the gate region abuts the field oxide region. Ions are then implanted to form a source/drain region in the substrate using the gate region and the field oxide region as a mask.
REFERENCES:
patent: 5306652 (1994-04-01), Kwon et al.
patent: 5650658 (1997-07-01), Beasom
patent: 6063671 (2000-05-01), Tung
patent: 6063674 (2000-05-01), Yang et al.
patent: 6110803 (2000-08-01), Tung
Elms Richard
Owens Beth E.
United Microelectronics Corp.
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