Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
1997-06-05
2001-09-04
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C427S579000
Reexamination Certificate
active
06284677
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to semiconductor fabrication processes, and more particularly, to a method of forming fluorosilicate glass (FSG) layers that serve as inter-metal dielectric (IMD) layers in a semiconductor wafer with a high moisture-resistant capability.
2. Description of Related Art
With semiconductor fabrication technologies advance to the submicron level of integration, the transistor elements in a semiconductor chip, such as MOS (metal-oxide semiconductor) transistors, are formed with even smaller line widths. The inter-metal dielectrics (IMD) that are used to isolate conductive layers in the chip should therefore have relatively high dielectric constant so as to provide reliable isolation. It is a well known principle in electronics that the operating speed of a circuit is inversely proportional to the RC (resistance-capacitance) delay in that circuit. In a semiconductor chip, the IMD layers have a capacitance C that would cause an RC delay to the signals processed by the chip. This capacitance is proportional to the dielectric constant K of the IMD layers.
Conventionally, undoped-silicate glass (USG) is used to form IMD layers in a semiconductor chip. However, one drawback to the use of USG is that it has a high dielectric constant K that will result in a high capacitance for the chip. A new dielectric, the fluorosilicate glass (FSG), is now widely used instead of USG to form the IMD layers. The dielectric constant K of FSG is dependent on the concentration of fluor (F) therein—the higher the flour concentration, the lower is the dielectric constant K of the FSG. However, a high flourine concentration will also cause the FSG to have high moisture absorbing property, which can cause the fluorine atoms in the FSC to react with the hydrogen atoms in the absorbed moisture, thus forming hydrofluoric acid (HF) that can easily cause erosion to the semiconductor components in the chip.
FIG. 1
is a schematic sectional diagram used to depict a conventional method for forming a layer of fluorosilicate glass (FSG)
10
over a semiconductor substrate that will be moisture-resistant. This method includes the step of forming a layer of undoped-silicate glass (USG), such as a silicon oxide (SiO
2
), over the FSG layer
10
. The USG layer
12
has a high moisture-resistant property so that it can protect the underlying FSG layer
10
from absorbing moistures.
One drawback to the foregoing method, however, is that the USG layer
12
has a high dielectric constant K that causes the resultant IMD layer, which is here a combination of the FSG layer
10
and the USG layer
12
, to have a high capacitance C, and thus a high RC delay for the semiconductor circuit on the chip. This will, as mentioned earlier, result in a degradation to the performance of the semiconductor circuit.
SUMMARY OF THE INVENTION
It is therefore a primary objective of the present invention to provide a method for forming fluorosilicate glass (FSG) layers with a high moisture-resistant capability while nonetheless allowing the resultant semiconductor circuit to have a low RC delay.
In accordance with the foregoing and other objectives of the present invention, a new method for forming fluorosilicate glass (FSG) layers in a semiconductor wafer is provided.
The method of the invention including the step of subjecting the FSG layer to a plasma treatment so as to form a moisture-resistant layer over the FSG layer. In the plasma treatment, the ionized gas of ammonia is used as the plasma. As a result of this plasma treatment, a layer of nitrogen-containing compound having a high moisture-resistant property is formed over the FSG layer, which serves as a moisture-resistant layer that can protect the FSG layer from absorbing moistures.
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patent: 5700736 (1997-12-01), Muroyama
patent: 5869149 (1999-02-01), Denison
patent: 405090249 (1993-04-01), None
patent: 408148562 (1996-06-01), None
Wolf, Stanely, Silicon Processing for the VLSI Era, vol.2 p346-47, 1990.*
Laxman, Ravi, “Low epsilon dielectrics: CVD fluorinated Silicon Dioxides” Semiconductor International, p71-74, May 1995.*
Wolf, Stanley, et al., Silicon Processing for the VLSI Era, vol. 1, pp. 191-194, 1986.*
Takeishi, S., et al., “Stabilizing Dielectric Constatns of Fluorine-Doped SiO2 Films by N2O Plasma Annealing” DUMIC Conference, pp 257-259, Feb. 1995.
Hsiao Chih-Hsiang
Hsu Chih-Ching
Bowers Charles
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Thompson Craig
United Semiconductor Corp.
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