Bulk and strained silicon on insulator using local selective...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Recessed oxide by localized oxidation

Reexamination Certificate

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C438S400000, C438S410000, C257S055000, C257S063000, C257S352000, C257S750000

Reexamination Certificate

active

06251751

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to forming bulk or strained Si/SiGe layered regions adjacent to or on an insulator and more particularly to local selective oxidation of SiGe for forming an insulator region underneath semiconductor regions for device applications such as complementary metal-oxide-semiconductor (CMOS) field effect transistors (FET's), modulation-doped field-effect transistors (MODFET's), dynamic random access memories (DRAM's), mixed DRAM and CMOS, static random access memories (SRAM's), BiCMOS, and rf.
BACKGROUND OF THE INVENTION
In silicon semiconductor technology, the only way to achieve insulating substrates is by resorting either to silicon on insulator (SOI), silicon on sapphire (SOS), or etch and bond back to achieve SOI. The main advantage of using an insulating substrate in CMOS and high speed FET's is to reduce the parasitic junction capacitance and the short channel effects and thus, increase the speed performance of the devices. One major problem with all of the above methods is that the insulator covers the entire wafer and consequently, the entire device area including underneath the ohmic contacts and channel of a FET. The buried oxide over an entire wafer results in the well known ‘floating body’ problem, since the semiconductor substrate is floating with respect to the channel. This problem has adverse affects on threshold voltage control and circuit operation. The other problem with the above solutions is that they are far more expensive than regular bulk silicon substrates. In addition, there is no simple way of getting strained silicon on insulator, which would have higher electron and hole transport properties.
SUMMARY OF THE INVENTION
In accordance with the present invention, a method for forming buried oxide regions below a region of a single crystal semiconductor layer is described comprising the steps of selecting a single crystal silicon substrate, forming a first epitaxial layer of constant or graded SiGe on the upper surface of the substrate having a first rate of oxidation. This layer can be either strained or relaxed SiGe or lattice matched SiGeC. Then forming a second epitaxial layer containing silicon on the first layer having a second rate of oxidation less than the first rate of oxidation, forming a mask over the second layer, patterning the mask to form openings in the mask, and oxidizing through the mask openings the second layer and the first layer whereby an oxide region forms having portions replacing portions or all of the first layer underneath the second layer.
The invention further provides forming FET's with its channel in the second layer above remaining portions of the first layer.


REFERENCES:
patent: 5670412 (1997-09-01), Juengling et al.
patent: 5783498 (1998-07-01), Dotta
patent: 5958505 (1999-09-01), Mantl
Solid State Phenomena, vols. 47-48 (1996), pp. 17-32, Scitec Publications, Switzerland 1996.

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