Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
1999-10-04
2001-06-26
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S669000, C257S315000, C257S774000
Reexamination Certificate
active
06251723
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor memory device, and more particularly, to the improvement of the isolation characteristics of a dynamic random access memory (DRAM) device.
2. Description of the Related Art
Recently, as DRAM devices have become more fine-structured, openings such as contact holes have also become more fine-structured. On the other hand, in order to increase the integration, as technology for forming a field insulating layer, a shallow trench isolation (STI) process has been adopted instead of a local oxidation of silicon (LOCOS) process.
In a prior art method for manufacturing a DRAM device, a plurality of openings are perforated in an insulating layer formed on first impurity diffusion regions for bit lines and second impurity diffusion regions for capacitors surrounded by a field insulating layer of a semiconductor substrate, and each of the openings corresponds to one of the impurity diffusion regions. This will be explained later in detail.
In the above-described prior art method, since each opening corresponds to one of the impurity diffusion regions, the sides of the field insulating layer may be etched, which would deteriorate the isolation characteristics. Particularly, if a field insulating layer is formed by an STI process so that the sides of the field insulating layer are sharp, the isolation characteristics would remarkably deteriorate. Also, since the size of contact structures, i.e., pad electrodes buried in the openings is decreased, the contact resistance is increased.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method for manufacturing a DRAM device capable of improving the isolation characteristics.
Another object is to decrease the contact resistance of a contact structure in the DRAM device.
According to the present invention, in a method for manufacturing a semiconductor memory device, a plurality of openings are perforated in an insulating layer formed on first impurity diffusion regions for bit lines and second impurity diffusion regions for capacitors of a semiconductor substrate surrounded by a field insulating layer, and each of the openings corresponds to one of the first impurity diffusion regions and at least two of the second impurity diffusion regions.
Thus, the photolithography process for forming the openings is easily carried out, so that the side etching of the field insulating layer can be avoided. Also, the size of the pad electrodes buried in the openings can be increased.
REFERENCES:
patent: 5545588 (1996-08-01), Yoo
patent: 5677225 (1997-10-01), Park
patent: 5972747 (1999-10-01), Hong
patent: 4-350928 (1992-12-01), None
patent: 9-8254 (1997-01-01), None
patent: 9-97882 (1997-04-01), None
patent: 10-50829 (1998-02-01), None
Japanese Office Action dated Nov. 14, 2000, with partial English translation.
Blum David S
Bowers Charles
McGinn & Gibb PLLC
NEC Corporation
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