Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2000-02-11
2001-06-19
Pham, Long (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S586000, C438S605000, C438S659000
Reexamination Certificate
active
06248634
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a field-effect transistor and fabrication method thereof and an image display apparatus using them. More particularly, the present invention deals with an amorphous silicon thin film transistor (TFT) for active matrix liquid crystal displays.
Active matrix liquid crystal displays (AMLCD) have the following features, namely, thin shape, light weight, low power consumption and high quality display, and have been produced in large quantities recently.
AMLCD usually use amorphous silicon thin film transistors as switching devices.
A staggered-type structure, which consists of source/drain electrodes, a gate electrode, a channel active layer with transistor behavior, and so on, is used popularly for amorphous silicon thin film transistors.
There are two types of amorphous silicon thin film transistors of staggered structure. One is an inverted staggered-type, in which the gate electrode and the glass substrate are located on the same side with respect to the channel active layer. The other type is a staggered type, in which the gate electrode and the glass substrate are located on opposite sides with respect to the channel active layer.
Regarding the amorphous silicon thin film transistor of the staggered type, the thin film transistor structure is constructed such that the source/drain electrodes are made from transparent electrode material. Moreover, the thin film transistor is fabricated using discharging impurity gas so that source/drain areas can be formed. An amorphous silicon layer including impurity is not used in the fabrication process. Details are found in Japanese Unexamined Patent Publication(Kokai) No. Sho-62-81064.
The basic structure of the amorphous silicon thin film transistor described in the above stated Publication, is shown in FIG.
1
.
Referring to
FIG. 1
, the amorphous silicon thin film transistor described above consists of an insulation substrate
1
, a pair of source and drain electrodes made of transparent conductive film
2
, a semiconductor film
4
, a gate insulation film
5
, and a gate metal film
6
.
Transparent electrode material such as ITO(indium-tin-oxide) generally has high resistivity compared to metallic material such as aluminum or chrome.
However, the long signal wirings laid vertically, and the long gate wirings laid horizontally, on the active matrix liquid crystal display need to have low resistance.
Therefore, thin film transistor such as that shown in
FIG. 1
that utilizes transparent electrode material such as ITO for the signal wiring has the problem that signal wiring resistance is high and cannot be reduced.
A solution to this problem would be to add a metal film
3
to the source/drain transparent electrode of the thin film transistor shown in FIG.
1
. Adding the metal film
3
as a signal line as shown in
FIG. 2
reduces resistance and the structure shown in
FIG. 2
is already being used in practice.
In the case of the thin film transistor structure shown in
FIG. 2
, in which a low resistance signal line made of a metal such as chrome is used for the source/drain electrode, the metal film
3
and the adjacent transparent picture element electrode must be insulated electrically.
Because the transparent picture element electrode and the metal film
3
are formed by two different photoresist processes, alignment precision tolerance between the two photoresist processes, etching process precision tolerance, and minimum isolation spacing width are necessary. Therefore, when the thin film transistor and the transparent picture element electrode are placed two-dimensionally in a display equipment using the thin film transistor structure shown in
FIG. 2
, the spacing width between the metal film
2
and the adjacent transparent picture element electrode must be wider than if the thin film transistor structure of
FIG. 1
were used.
As a result, when the display equipment is made of the thin film transistor structure shown in
FIG. 1
or in
FIG. 2
, the transparent picture element area of the thin film transistor structure shown in
FIG. 2
must be smaller than that of the thin film transistor structure shown in
FIG. 1
of the same size. That is, there would arise the problem that the use of the thin film transistor structure in
FIG. 2
would result in a decrease in the aperture efficiency of the liquid crystal display.
Further, regarding TFT-LCD (thin film transistor liquid crystal display), the gate electrode of the thin film transistor is connected to a so-called scan line, the source electrode is connected to, for example, a data line, and the drain electrode is connected to the picture element electrode. It will be noted that, in the case of data writing for instance, a charge signal is transferred from the source electrode to the drain electrode while a discharge signal is transferred in the opposite direction. Since we could not exactly define which electrode is the source electrode and which electrode is the drain electrode of the thin film transistor, we call one of the electrodes a source/drain electrode, and a pair of electrodes, source/drain electrodes.
SUMMARY OF THE INVENTION
The objectives of the present invention are to solve the aforementioned problems and to provide a field-effect transistor (thin film transistor) that could realize a liquid crystal display equipment with high aperture efficiency and low resistance signal wirings.
Further, another objective of the present invention is to provide a field-effect transistor (thin film transistor) that has enhanced ohmic characteristics.
Further, another objective of the present invention is to provide a field-effect transistor (thin film transistor) that has low leakage current between the source and drain when the gate of the transistor is negatively biased.
The foregoing objectives are attained by providing a field-effect transistor comprising a first, a second, a third, a fourth and a fifth region, in which a current flow path is generated through the fifth region between the first and second regions when a predetermined voltage is applied to the third region, wherein: the first region is made of transparent conductive material and is connected to the fifth region; the second region is made of opaque conductive material and is connected to the fifth region; the third region is made of conductive material and is deposited on the fourth region; the fourth region is made of insulation material and is deposited on the fifth region; and the fifth region is made of semiconductor material. This field-effect transistor according to the present invention will be described in the section on the detail description of the preferred embodiments with reference to FIG.
3
.
Further, the foregoing objectives are attained by providing a field-effect transistor comprising a first, a second and a third metal electrode, a semiconductor region, and an insulation region sandwiched between the third metal electrode and the semiconductor region, in which a current flow path is generated through the semiconductor region between the first and second metal electrodes when a predetermined voltage is applied to the third metal electrode, the field-effect transistor being fabricated using a method the steps of which comprise: (a) a forming step of forming a metal film on an insulation substrate; (b) a first patterning step of patterning the metal film into a first metal electrode and a second metal electrode; (c) a discharging step of discharging an impurity gas over the first and second metal electrodes; (d) a depositing step of depositing an amorphous silicon film, an insulation film and a gate electrode film, in the order, on the first and second electrodes and on the insulation substrate; and (e) a second patterning step of patterning a multi-layer film comprising the amorphous silicon film, the insulation film and the gate electrode film into a gate electrode pattern. This field-effect transistor according to the present invention will be described in the section on the detailed description of the preferred embodiments wit
Hayama Hiroshi
Nishida Shin-ichi
Coleman William David
NEC Corporation
Pham Long
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