Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1999-06-11
2001-01-09
Quach, T. N. (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S649000, C438S657000, C438S669000
Reexamination Certificate
active
06171950
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to the structure and method for forming a semiconductor device. More particularly, the present invention relates to a multilevel interconnection of a semiconductor device having a lower conductive layer whose uppermost surface is formed of silicide, connected through a contact hole to an impurity-containing upper conductive layer, and the method of the semiconductor device.
A multilayer interconnecting method for forming the conductive layers of an integrated semiconductor device into a multilayer structure can increase integration while maintaining electrical reliability of the device. In such a structure, a contact resistance between conductive layers is the most important factor in determining the electrical reliability. Here, even though conductive material having a low resistance may be used to form the interconnection, the resulting contact resistance may be high, so that the overall resistance of the whole interconnection is increased, which seriously deteriorates the electrical characteristics of the device. The contact resistance largely depends on the dimensions of the contact hole. Currently, since contact holes tend to become smaller as integration increases, a change in the contact resistance depending from a reduction of the contact hole's dimension is an increasingly important issue for semiconductor manufacturing.
Aluminum has been conventionally used as the material constituting the interconnection. Aluminum has the advantage of low sheet resistance, while it has the disadvantage of a low melting point. This causes a serious problem in that the interconnection is deformed by the heat energy provided when the device is manufactured. Accordingly, conductive material such as polysilicon is mainly used as the material constituting the interconnection. The magnitude of the polysilicon sheet resistance can be controlled by the concentration of doped impurities and polysilicon has a high melting point which prevents the interconnection from deforming even at high thermal energy.
For instance, monolayer-structured polysilicon into which a N-type or P-type impurity is doped, or multilayered polycide in which silicide such as tungsten silicide (WSi
x
) is laminated on the monolayer-structured polysilicon is mainly used.
FIG. 1
is a cross-sectional view showing a general multilevel interconnection between a polycide layer and a polysilicon layer. Here, reference numeral
10
denotes a semiconductor substrate,
12
denotes a first polysilicon layer,
14
denotes a first silicide layer,
16
denotes an interlayer dielectric layer,
18
denotes a second polysilicon layer, and
1
denotes a contact hole.
As shown in
FIG. 1
, in the formation of the multilevel interconnection, a lower conductive layer of a polycide structure in which first polysilicon layer
12
and first silicide layer
14
are laminated onto semiconductor substrate
10
is connected to an upper conductive layer such as a mono-layered second polysilicon
18
through contact hole
1
formed in interlayer dielectric layer
16
.
Pure polysilicon cannot be used as conductive material due to its high sheet resistance. If predetermined impurity ions are doped into the pure polysilicon, however the sheet resistance is reduced and the doped polysilicon can be used as a conductive material. Generally, the doping of impurities into pure polysilicon is carried out during or after the deposition of polysilicon.
Also, since silicide has a much lower resistance than impurity-doped polysilicon, a conductive layer having the structure of a silicide layer laminated on a polysilicon layer (i.e., polycide structure) is mainly used.
Generally, in a multilevel interconnection having a polycide structure, the resistance of the interconnection can be reduced by laminating a silicide layer with low resistance onto a polysilicon layer. The impurity ions doped into the polysilicon, however, diffuse through the interface between the polysilicon layer and the silicide layer thereby increasing the contact resistance. Therefore, the electrical characteristics and integration degree of the device are deteriorated.
FIG. 2A
is a cross-sectional view of a multilevel interconnection having a lower conductive layer constituted a polysilicon, and
FIG. 2B
is a cross-sectional view of a multilevel interconnection having a polycide-structured lower conductive layer.
In
FIG. 2A
, the lower conductive layer is made of only a first layer of polysilicon, and the upper conductive layer has a polycide structure in which a second layer of polysilicon and tungsten silicide are sequentially laminated on the first layer of polysilicon. Here, silicide is not interposed between the first and second layers of polysilicon.
In
FIG. 2B
, the lower conductive layer has a polycide structure in which a first layer of polysilicon and first tungsten silicide are sequentially, and the upper conductive layer has a polycide structure in which a second layer of polysilicon and a second layer of tungsten silicide are sequentially laminated. Here, silicide is interposed between the first and second layers of polysilicon.
FIG. 3
is a graph showing the distribution of the multilevel interconnection resistances according to the structure of the lower conductive layer, in which “A” represents a contact resistance between polysilicon layers when phosphorus ions are doped into the polysilicon, “B” represents a contact resistance between a polycide-structured lower conductive layer and an upper conductive layer where boron ions are doped into the polysilicon constituting the upper conductive layer, and “C” represents a contact resistance between a polycide-structured lower conductive layer and an upper conductive layer where arsenic ions are doped into the polysilicon constituting the upper conductive layer.
As shown in
FIG. 3
, it can be seen that the contact resistance generated when a polysilicon layer is directly connected to another polysilicon layer is much smaller than that between a polycide layer and a polysilicon layer.
It is assumed that this is due to the increase in contact resistance of the contact region, resulting from absorption of impurities doped into the second polysilicon layer, to the interface of the second polysilicon layer and the first silicide layer.
Therefore, to improve the electrical characteristics and integration degree of the semiconductor device, the problem in which a contact resistance increases by diffusing impurity, doped into the polysilicon layer, to the interface between to polysilicon layer and to silicide layer should be solved.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a multilevel interconnection for reducing contact resistance between a lower conductive layer, whose uppermost surface is formed of silicide, and an upper conductive layer, whose lowermost surface is formed of an impurity-containing conductive layer, thereby forming a multilayer interconnection with high reliability.
Another object of the present invention is to provide a suitable method for forming the above structural multilevel interconnection.
To achieve the first object, there is provided a multilevel interconnection comprising: a first impurity-containing conductive layer formed on a semiconductor substrate; a first silicide layer, having a first region thinner than a second region, formed on said first impurity-containing conductive layer; an interlayer dielectric layer formed on a region other than said first region; a contact hole for exposing said first silicide layer of said first region; and a second impurity-containing conductive layer connected to said first silicide layer through said contact hole.
To achieve the first object, there is provided a multilevel interconnection comprising: a first impurity-containing conductive layer formed on a semiconductor substrate; a first silicide layer formed on said first impurity-containing conductive layer and having a hole; an interlayer dielectric layer formed with a contact hole for exposing said first impurity-co
Lee Soo-cheol
Lee Yong-jae
Pillsbury Madison & Sutro LLP
Quach T. N.
Samsung Electronics Co,. Ltd.
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