Metal fusion bonding – Process – Plural joints
Reexamination Certificate
2000-08-23
2001-09-04
Dunn, Tom (Department: 1725)
Metal fusion bonding
Process
Plural joints
C228S189000, C228S180210
Reexamination Certificate
active
06283359
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a solder structure which provides enhanced fatigue life properties when used to bond substrates and, more particularly, to a solder structure such as a sphere or column having a metal layer which structure is used as a Ball Grid Array (BGA) or Column Grid Array (CGA) to make second level solder connections in electronic components such as joining a substrate to a circuit card.
2. Description of Related Art
The use of solder to join materials such as components of an electronic structure is well known in the art. In the electronics area there are a myriad of electronic components which require connection to other electronic components or to other levels of packaging. Examples include mounting of integrated circuit chips to a metallized substrate, multilayer ceramic substrate (MLC), laminate organic substrate, glass ceramic substrate, card (direct-chip-attach, DCA), and any substrate made of composite materials meeting thermal and mechanical properties. This description will be directed to for convenience to second level surface mount technology whereby column grid arrays (CGA) or ball grid arrays (BGA) are used to form an interconnection between a circuit board and an electronic module assembly such as a chip connected to a MLC.
The term Ball Grid Arrays (BGAs) refers to a broad class of microelectronic substrate assemblies that are connected to the board/card by means of an array of solder balls. Such interconnections are first formed by joining solder balls to the substrate assembly thus creating the BGA. The BGA is subsequently joined to the card during assembly. Substantial differences in the thermal coefficient of expansion (TCE) can exist between the board and the substrate, as is the case when the substrate is made from a ceramic material, and the board is made from an epoxy-glass composite (e.g., FR4). During thermal cycling (on-off cycles), such TCE differences cause plastic deformation of the solder ball interconnections. Accumulation of plastic strain with repeated thermal cycling ultimately leads to fatigue failure of the interconnections between the ceramic substrate and the board.
The actual fatigue life of a BGA decreases with increasing array size. Furthermore, for a given array size, the fatigue life of a BGA is a function of the materials that comprise the substrate, board, and interconnections, and also the interconnection structure. Thus, the present trend towards higher powered packages, coupled with higher I/O counts, and larger interconnection arrays, creates a need for interconnections with improved fatigue life. Using solder column arrays instead of ball arrays provides the desired improvement in fatigue life by allowing the interconnection length to increase with the enhancement in fatigue life in this case being due to the inverse relationship between interconnection length and accumulated plastic strain during thermal cycling. Unfortunately, the inherent fragility of the columns, and their sensitivity to handling damage makes them less attractive to end users. In contrast, BGAs are relatively robust, and are less sensitive to handling related damage. Thus, any approach that enhances fatigue life while maintaining the ball geometry is highly desirable, and will provide a very attractive solution to the end user.
Ceramic Column Grid Array (CCGA) packages are finding increasing use in many high performance chip carrying packages. The preferred manufacturing process for CCGA is the wire column process. This process, shown in
FIG. 6A
, uses eutectic Sn/Pb solder
34
to attach the column array
21
to I/O pads
26
on the ceramic carrier
25
. The use of low melting eutectic solder enables the attachment of columns at the end of the module assembly, after the chip or die is attached and tested and burnt-in on the carrier. This approach has one serious drawback. The ceramic carrier is joined to an organic card
31
by using a low temperature solder, typically eutectic Sn/Pb solder
33
. In card assembly operations, it is often necessary to rework the module if it is found to have a defective column joint or less frequently, to replace the chip carrier
25
with another containing a higher performing chip. During card level rework using hot gas or other localized heating techniques, both the eutectic solder interfaces
33
and
34
on the chip carrier
25
and the card
31
are molten. As a result, during removal of the chip carrier
25
, a substantial number of columns can stay behind on the card as shown in FIG.
6
B. Prior to rejoining of a new CCGA module, the card site has to be “dressed” which is a manual operation to remove the columns that stayed on the card I/O pads
32
.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a solder structure which provides enhanced fatigue life properties when used to bond substrates particularly electronic substrates at the second level such as a circuit board to an electronic module assembly such as a chip bonded to a multilayer ceramic substrate.
It is an additional object of the invention to provide a method of forming a higher melting column attach joint to the chip carrier I/O pad than the attach joint to a substrate such as a circuit board. The higher melting solder alloy is chosen such that it does not melt during card level module rework, thus enabling effective removal of the chip CCGA chip carrier from the card, e.g., without leaving any columns attached to the planar card I/O pads.
It is another object of the present invention to provide a method for making solder interconnections using the solder structure of the invention particularly second level ball grid array and column grid array solder interconnections.
A further object of the invention is to provide electronic structures made using the solder structures and method of the invention.
Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.
SUMMARY OF THE INVENTION
The above and other objects, which will be apparent to those skilled in the art, are achieved by the present invention which relates in a first aspect to a solder structure, e.g., in the form of a column or sphere, which, when used to solder bond (attach) electronic substrates together, forms an enhanced fatigue resistant solder bond, the solder structure comprising:
an inner core of solder; and
a first layer of a metal wettable by the solder used for the attach and having a melting point higher than the solder of the inner core with the inner core solder preferably having a melting point higher than the solder to which the solder structure is to be attached to the substrate.
The solder structure may be a solder column up to about 87 mils tall or higher, e.g., 100 mils, and typically above about 10 mils tall. A preferred solder column has a solder height of about 50 to 87 mils. The height of the column may be over three times its diameter (the ratio of height to diameter typically being termed the aspect ratio) with high aspect ratios providing enhanced fatigue resistance. The solder structure may also be a sphere typically about 10 to 45 mil, or more, in diameter. The solder for both structures may be of any composition and preferably comprises about 3 to 20% by weight tin and the balance lead.
In another aspect of the present invention, a method is provided for making solder electrical interconnections in an electronic component assembly, particularly a second level assembly, comprising the steps of:
applying a second solder to first pads on the surface of a first substrate of the electronic component;
forming a solder structure comprising:
an inner core of a first solder; and
a first layer of a metal wettable by the solder used for the interconnection and having a melting point higher than the first solder of the inner core with the inner core solder preferably having a melting point higher than the second solder to which the solder structure is to be attached
Brofman Peter J.
Courtney Mark G.
Farooq Shaji
Interrante Mario J.
Jackson Raymond A.
Blecker Ira D.
DeLio & Peterson LLC
Dunn Tom
International Business Machines - Corporation
Johnson Jonathan
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