Method to form elevated source/drain with solid phase diffused s

Details Method to form elevated source/drain with solid phase diffused s Method to form elevated source/drain with solid phase diffused s

1998-01-26

1999-08-31

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438304, 438305, 438563, 438595, 438596, H01L 21336

Patent

active

059465808

ABSTRACT:
A gate insulator layer is formed over the semiconductor substrate and a first silicon layer is then formed over the gate insulator layer. An anti-reflection layer is formed over the first silicon layer. A gate region is defined by removing a portion of the gate insulator layer, a portion of the first silicon layer, and a portion of the anti-reflection layer. A shield layer is then formed over the semiconductor substrate, on the gate insulator layer, and on the first silicon layer. A spacer structure containing first conductivity type dopants is then formed on the gate region. Following the removal of the anti-reflection layer, a second silicon layer containing second conductivity type dopants is formed over the semiconductor substrate and the first silicon layer. Finally, a thermal process is performed to the semiconductor substrate for diffusing the first conductivity type dopants and the second conductivity type dopants into the semiconductor substrate.

REFERENCES:
patent: 5200352 (1993-04-01), Pfiester
Kiyoshi Takeuchi et al., High Performance Sub-tenth Micron CMOS Using Advanced Boron Doping and WSI.sub.2 Dual Gate Process, 1995, pp. 9-10.
Shye Lin Wu et al., Supression of Boron Penetration into an Ultra-Thin Gate Oxide (.ltoreq. 7nm) by Using a Stacked-Amorphous-Silicon (SAS) Film, 1993 IEEE, pp. 329-332.
T.P. Ong et al., CVD SiN.sub.x Anti-reflective Coating for Sub-/.5.mu.m Lithography, 1995, pp. 73-74.
Tan Fu Lei et al., Low-Temperature Growth of Silicon-Boron Layer as Solid Diffusion Source for Polysilicon Contacted p.sup.+ -n Shallow Junction, 1995 IEEE, pp. 2104-2110.

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