Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1976-08-11
1978-04-25
Hecker, Stuart N.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
307238, 365149, G11C 700, G11C 1124
Patent
active
040866629
ABSTRACT:
A memory system includes a plurality of word lines arranged in parallel in a predetermined direction, a plurality of sense lines arranged in parallel to be transverse to the word lines, and memory cells located at the intersections of both the sense lines and the word lines. In addition, a control line is arranged for each of the sense lines in parallel thereto such that the selection of a given word line and a given control line enables the reading or writing of information from or to the cell located at the intersection of the selected lines.
REFERENCES:
patent: 3142822 (1964-07-01), Martin
patent: 3771147 (1973-11-01), Boll et al.
patent: 3810124 (1974-05-01), Hoffman et al.
patent: 3838295 (1974-09-01), Lindell
patent: 3986180 (1976-10-01), Cade
Proceedings of the S.I.D., vol. 11/3, Third Quarter 1970, pp. 97-104, Weiss, "Inexpensive Electronic Memories".
Hecker Stuart N.
Hitachi , Ltd.
McElheny Donald
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