Lead frame for semiconductor devices

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

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Details

257666, 257677, 257741, 257784, 257796, H01L 23495, H01L 2348, H01L 2328

Patent

active

058443053

ABSTRACT:
A lead frame for a semiconductor device, comprising; a die pad having a major surface upon which a semiconductor die is placed, the major surface being clad with a metal layer, an inner lead portion electrically connected to the semiconductor die, wherein the die pad and the inner lead portion are embedded within a molding resin, and an outer lead portion exposed outside the molding resin, electrically connected to the inner lead portion, and adapted for connection to a printed circuit board land, wherein the die pad, inner lead portion, and outer lead portion are formed from a metal having a thermal expansion coefficient equal to that of the printed wiring board land.

REFERENCES:
patent: 4673967 (1987-06-01), Hingorany
patent: 5134459 (1992-07-01), Maeda et al.
patent: 5276351 (1994-01-01), Yamazaki et al.
patent: 5329158 (1994-07-01), Lin
patent: 5360991 (1994-11-01), Abys et al.
patent: 5455446 (1995-10-01), Suppelsa et al.

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