Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-03-02
1999-12-28
Chaudhuri, Olik
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438201, 438211, 438594, H01L 218247
Patent
active
060080906
ABSTRACT:
The method of the present invention includes patterning a gate structure. Then, a polyoxide layer is formed on side walls of the gate structure. Then, silicon nitride side wall spacers is formed on the side walls of the gate structure. Then, source/drain structure of the device is fabricated. Next, the side wall spacers is removed to expose a portion of the source and drain. Then, an undoped amorphous silicon layer is formed on the surface of the gate structure, the oxide layer and the exposed source and drain. A dry oxidation process is used to convert the amorphous silicon layer into textured tunnel oxide at the interface of the substrate and the oxide. A polysilicon layer is than formed, followed by chemical mechanocal polishing the layer. A rugged silicon layer is subsequently deposited over the gate and the polished polysilicon. Then, the floating gate is defined. A dielectric is formed at the top of the rugged silicon. A conductive layer is formed on the dielectric layer as a control gate.
REFERENCES:
patent: 5079180 (1992-01-01), Rodder et al.
patent: 5683924 (1997-11-01), Chan et al.
patent: 5877052 (1999-03-01), Lin et al.
patent: 5918125 (1999-06-01), Guo et al.
patent: 5930617 (1999-07-01), Wu
Chaudhuri Olik
Duy Mai Anh
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