Method of fabricating an SRAM device with a self-aligned thin fi

Details Method of fabricating an SRAM device with a self-aligned thin fi Method of fabricating an SRAM device with a self-aligned thin fi

1996-09-27

1997-10-07

Bowers, Jr., Charles L.

Fishing, trapping, and vermin destroying

257903, H01L 2170, H01L 2700

Patent

active

056747705

ABSTRACT:
A process for fabricating SRAM cells, including MOSFET devices, as well as thin film transistor structures, has been developed. The process features self-alignment of the MOSFET polysilicon gate structure to the polysilicon gate structure of the thin film transistor. Self-alignment is accomplished via a photolithographic and dry etching patterning procedure, applied to a combination of polysilicon, and insulator layers, resulting in the desired polysilicon gate structures for both the MOSFET and thin film transistor devices.

REFERENCES:
patent: 5194749 (1993-03-01), Meguro et al.
patent: 5385854 (1995-01-01), Batra et al.
patent: 5483104 (1996-01-01), Godinho et al.
patent: 5485420 (1996-01-01), Lage et al.
patent: 5516715 (1996-05-01), Itabashi et al.

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