Method to make an asymmetrical LDD structure for deep sub-micron

Details Method to make an asymmetrical LDD structure for deep sub-micron Method to make an asymmetrical LDD structure for deep sub-micron

1996-04-22

1998-01-06

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438304, 438307, H01L 21336

Patent

active

057054398

ABSTRACT:
A method for forming an asymmetrical LDD structure is described. A polysilicon gate electrode is formed overlying a layer of gate silicon oxide on the surface of a semiconductor substrate. The surfaces of the semiconductor substrate and the gate electrode are oxidized to form a surface oxide layer. Polysilicon spacers are formed on the sidewalls of the gate electrode wherein one side of the gate electrode is a source side and the other side of the gate electrode is a drain side. The polysilicon spacer on the source side of the gate electrode is removed. First ions are implanted to form heavily doped source and drain regions within the semiconductor substrate not covered by the gate electrode and the polysilicon spacer on the drain side of the gate electrode. Then the drain side polysilicon spacer is removed. Second ions are implanted to form a lightly doped drain region within the semiconductor substrate underlying the removed drain side polysilicon spacer completing the formation of a lightly doped drain structure in the fabrication of an integrated circuit device.

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