Semiconductor structure useful in a self-aligned contact having

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257324, 257325, 257382, 257383, 257486, 257635, 257636, 257637, 257638, 257640, 257641, 257642, 257643, 257644, H01L 29788

Patent

active

060181842

ABSTRACT:
A semiconductor processing method is provided for making contact openings. It includes depositing several insulative layers and performing an anisotropic etch. One layer is a conformal oxide covering the contact area and adjacent structures. A second layer is a breadloafed oxide deposited over the contact area and adjacent structures. A third layer is a doped oxide deposited over the two lower layers. The anisotropic etch is performed through the oxide layers to the contact area located on a lower substrate. The etch is selectively more rapid in the third oxide than in the two other oxides. The breadloafed oxide provides additional protection and reduces the risk of etch-through to conductive structures adjacent the contact area. An alternate embodiment replaces the two lowest oxide layers by a breadloafed nitride layer. In this embodiment, the anisotropic etch is selectively more rapid in oxides than in nitrides.

REFERENCES:
patent: 5282160 (1994-01-01), Yamagata
patent: 5286344 (1994-02-01), Blalock et al.
patent: 5304829 (1994-04-01), Mori et al.
patent: 5604367 (1997-02-01), Yang

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