Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-10-31
1998-07-28
Niebling, John
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438307, H01L 218234
Patent
active
057862575
ABSTRACT:
A MOS device and method of fabricating the same, wherein the source/drain region has polysilicon trench structure which are formed by self-alignment using silicon oxide layers as masks. The source/drain regions extend to the field oxide layer and/or above the gate. Therefore, contacts can be formed on source/drain conductive regions above the field oxide layer.
REFERENCES:
patent: 5124272 (1992-06-01), Saito et al.
patent: 5491099 (1996-02-01), Hsu
patent: 5498556 (1996-03-01), Hong et al.
patent: 5527725 (1996-06-01), Park
patent: 5538909 (1996-07-01), Hsu
Booth Richard A.
Niebling John
United Microelectronics Corporation
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