Method of making asymmetrical transistor with lightly and heavil

Details Method of making asymmetrical transistor with lightly and heavil Method of making asymmetrical transistor with lightly and heavil

1997-04-21

1999-07-13

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, 438306, H01L 21336

Patent

active

059239824

ABSTRACT:
A method of making the IGFET includes providing a semiconductor substrate, providing a gate over the semiconductor substrate, implanting lightly doped source and drain regions into the substrate, forming a source-side spacer and a drain-side spacer in close proximity to opposing sidewalls of the gate, forming a masking layer that covers the drain-side spacer and includes an opening over the source-side spacer, removing the source-side spacer, and implanting a heavily doped drain region and an ultra-heavily doped source region into the substrate after removing the source-side spacer while the drain-side spacer is present, wherein the heavily doped drain region is implanted through the masking layer and the ultra-heavily doped source region is implanted through the opening in the masking layer. Accordingly, the ultra-heavily doped source region has a greater doping concentration than that of the heavily doped drain region due to the masking layer, and a portion of the lightly doped drain region is protected from the second source/drain implant step due to the drain-side spacer. Advantageously, the IGFET has low source-drain series resistance and reduces hot carrier effects.

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