Method of fabricating dynamic random access memory

Details Method of fabricating dynamic random access memory Method of fabricating dynamic random access memory

1999-06-09

2000-09-05

Smith, Matthew

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438255, 438253, H01L 218242

Patent

active

061142026

ABSTRACT:
A method of fabricating a DRAM. A substrate comprising a MOS is provided. A first dielectric layer is formed on the substrate. The first dielectric layer is patterned to form a bit line contact window exposing a source region of the MOS and a node contact window exposing a drain region of the drain region simultaneously. The bit line window and the node contact window are filled with a bit line and a polysilicon plug by the formation of the same polysilicon layer, respectively. A second dielectric layer with an opening exposing the polysilicon plug is formed on the first dielectric layer. The sidewall and bottom surface of the opening are covered by another polysilicon layer. The second dielectric layer is removed to leave a node contact in contact with the polysilicon plug.

REFERENCES:
patent: 5824582 (1998-10-01), Tseng
patent: 5940710 (1999-08-01), Chung et al.
patent: 5956587 (1999-09-01), Chen et al.
patent: 5956594 (1999-09-01), Yang et al.

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