Process and apparatus for etching metal in integrated circuit st

Details Process and apparatus for etching metal in integrated circuit st Process and apparatus for etching metal in integrated circuit st

1995-03-23

1997-03-25

Dang, Thi

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

1566561, 156345, H01L 2100, H05H 100

Patent

active

056140606

ABSTRACT:
A process and apparatus are described for patterning a masked metal layer to form a layer of metal interconnects for an integrated circuits structure which removes metal etch residues, while inhibiting or eliminating erosion of the photoresist mask, by providing an amplitude modulation of the RF bias power supplied to the substrate support of the substrate being etched. The amplitude modulation of the RF power superimposes short pulses of RF power of sufficient magnitude (pulse height) and of sufficient duration (pulse width) to remove metal etch residues as they form during the etch process without, however, eroding the photoresist etch mask during the etch process sufficiently to adversely impact the patterning of the metal layer.

REFERENCES:
patent: 4500563 (1985-02-01), Ellenberger et al.
patent: 4808258 (1989-02-01), Otsubo et al.
patent: 5261965 (1993-11-01), Moslehi
patent: 5310452 (1994-05-01), Doki et al.
patent: 5352324 (1994-10-01), Gotoh et al.
patent: 5433258 (1995-07-01), Barnes et al.
patent: 5435886 (1995-07-01), Fujiwara et al.

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