Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-10-07
1998-06-09
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438240, 438254, 438397, H01L 218242, H01L 2120
Patent
active
057633045
ABSTRACT:
A method of forming a capacitor on a semiconductor substrate includes forming a first oxide layer on the semiconductor substrate. A contact hole is then formed in the first oxide layer. A first conductive layer is formed on the first oxide layer and in the contact hole. Then the first conductive layer is etched back to the surface of said first oxide layer. A trench is formed in the first dielectric layer aligned with the first conductive layer, with the upper portion of the first conductive layer extending upwards from the bottom surface of the trench. A second conductive layer is conformally deposited on the first conductive layer and the first oxide layer. A second oxide layer is formed on the second conductive layer, filling the trench. A chemical mechanical polishing (CMP) process is then performed to remove the upper portions of the first and second oxide layers and the first and second conductive layers. The lower portions of the first and second oxide layers are removed by using a highly selective etching process. The resulting polysilicon structure serves as a bottom storage node of the capacitor. A dielectric film is formed on the first conductive layer and the second conductive layer. A third conductive layer is formed over the dielectric film to form the top storage node of the capacitor.
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patent: 5302540 (1994-04-01), Ko et al.
patent: 5340763 (1994-08-01), Dennison
patent: 5374580 (1994-12-01), Baglee et al.
patent: 5405796 (1995-04-01), Jones, Jr.
patent: 5552334 (1996-09-01), Tseng
Chang Joni
Vanguard International Semiconductor Corporation
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