Method of forming self-aligned DRAM cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438250, 438251, 438252, 438253, 438393, 438394, 438396, H01L 21336, H01L 218242

Patent

active

061598089

ABSTRACT:
A method of forming a dynamic random access memory cell such that the gate conductive layer, the bit line contact, the node contact, the bit line and the node contact plug are all formed using self-aligned processes. By employing the self-aligned method of forming DRAM cell, isolation structures are no longer etched in the process of forming the node contact opening. In addition, the aspect ratio of the node contact opening is reduced and processing window is thereby widened.

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patent: 6037216 (2000-03-01), Liu et al.

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