Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-12-23
1999-11-02
Brown, Peter Toby
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438200, 438232, 438234, 438376, 438373, 438275, 438416, 438420, 438526, 438540, H01L 218238
Patent
active
059769211
ABSTRACT:
A semiconductor device having an electrostatic discharge protection device and at least one accompanying device selected from the group comprising of a N or P channel MOS transistor, CMOS, bipolar transistor and BiCMOS, in which the electrostatic discharge protection device comprises a vertical type bipolar transistor including; a semiconductor substrate; an epitaxial layer laminated on the semiconductor substrate; a buried collector of a first conductivity type which is formed of the semiconductor substrate or which is formed from the surface of the semiconductor substrate to the epitaxial layer; a base of a second conductivity type which is a lightly doped well and formed on the epitaxial layer; and an emitter of the first conductivity type and formed on the surface layer of the base of the second conductivity type; and in which the base is adapted to have impurity concentration and depth so that a punch-through is generated between the emitter and the collector of the electrostatic discharge protection device when a voltage higher than the operation voltage of the accompanying device or a voltage lower than the ground voltage is applied between the emitter and the collector, the base and the emitter being shorted with each other.
REFERENCES:
patent: 5471082 (1995-11-01), Maeda
patent: 5504362 (1996-04-01), Pelella et al.
patent: 5760448 (1998-06-01), Maeda
Brown Peter Toby
Pham Long
Sharp Kabushiki Kaisha
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