Process for manufacturing a CMOS circuit with all-around dielect

Details Process for manufacturing a CMOS circuit with all-around dielect Process for manufacturing a CMOS circuit with all-around dielect

1998-02-20

2000-09-26

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438221, 438296, H01L 218238

Patent

active

061241563

ABSTRACT:
A CMOS circuit has all-around dielectrically insulated source-drain regions. Trenches are formed in the source-drain regions. The trenches are etched into the mono-crystalline silicon and filled with undoped or very lightly doped silicon. The completely or nearly completely depleted silicon in the trenches represents a dielectrically insulating layer and insulates the source-drain regions towards the adjacent silicon substrate.

REFERENCES:
patent: 4916508 (1990-04-01), Tsukamoto et al.
patent: 5043778 (1991-08-01), Teng et al.
patent: 5132755 (1992-07-01), Ueno

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