Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-11-18
1998-02-10
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438294, 438298, 438430, H01L 21336, H01L 2176
Patent
active
057168865
ABSTRACT:
A high-voltage MOS (metal-oxide semiconductor) device and a method for fabricating the same is provided. The high-voltage MOS device features the forming of trench-type source/drain regions by the use of silicon nitride layers to conduct a self-alignment etching process on a polysilicon conductive layer. In addition, an insulating layer is formed between the source/drain regions and the substrate, which prevents the breakdown at the junction between the source/drain regions and the substrate and also prevent the occurrence of leakage current therein. The forming of metal contact windows on the source/drain regions over isolation layers also allows the prevention of over etching, the occurrence of metal spikes, and misalignment of critical dimensions on the substrate. The thus fabricated high-voltage MOS device is therefore more reliable.
REFERENCES:
patent: 5192696 (1993-03-01), Bulat et al.
patent: 5474940 (1995-12-01), Tsukamoto
patent: 5510288 (1996-04-01), Hong
patent: 5518938 (1996-05-01), Yang
patent: 5547895 (1996-08-01), Yang
patent: 5612242 (1997-03-01), Hsu
Trinh Michael
United Microelectronics Corporation
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