Structure of a ferroelectric memory cell and method of fabricati

Details Structure of a ferroelectric memory cell and method of fabricati Structure of a ferroelectric memory cell and method of fabricati

1999-01-25

2000-06-13

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257296, 257300, 257298, 257 71, 257750, 257753, 257758, 257763, 257764, H01L 2976, H01L 2994, H01L 31062

Patent

active

060752645

ABSTRACT:
A method of fabricating A ferroelectric memory cell composed of an MOS transistor and A ferroelectric capacitor formed over A semiconductor substrate, comprises the steps of forming A contact hole through an insulating layer to form A contact plug to electrically connect the source region of the MOS transistor and the lower electrode of the ferroelectric capacitor, depositing over the contact hole an oxidizable substance layer to combine with the oxygen generated while forming the ferroelectric layer of the ferroelectric capacitor before forming the contact plug in the contact hole, depositing A conductive oxygen compound layer to separate and pass the oxygen to the upper part of the oxidizable substance layer, and forming the contact plug to electrically connect the source region of the MOS transistor and the lower electrode of the ferroelectric capacitor. Preferably, the lower electrode is composed of Pt, the ferroelectric layer of PZT or barium titanate or Rochelle salt, and the upper electrode of Pt or Al. The oxidizable substance layer is composed of A titanium compound, which may be titanium nitride or A mixture of titanium and its nitride. The conductive oxygen compound layer may be composed of ITO, IrO.sub.2, ReO.sub.2, RuO.sub.2 or MoO.sub.2, or their compound, or their composite layer.

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