Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-10-30
2000-06-13
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, H01L 218742
Patent
active
060749113
ABSTRACT:
A method of fabricating a dual trench capacitor with a horn region is provided. On a semiconductor substrate having at least a device isolation structure and a transistor thereon, wherein the transistor includes at least a gate and a source/drain region, an insulation layer with an opening exposing the source/drain region is formed. The opening is partly filled with a conductive plug, the plug having a surface level lower than a surface level of the insulation layer, so that a trench with a side wall of the insulation layer is formed on the plug within the opening. A conductive spacer is formed on the side wall with a horn shape. A part of the insulation layer which encompassing the conductive plug and the conductive spacer is removed, so that a dual trench structure which exposes outer side walls of the conductive spacer and the conductive plug, and a part of the insulation layer is formed. A conformal conductive layer is formed to cover whole surfaces of the dual trench structure, the conductive spacer and the conductive plug, so that a bottom electrode formed by the conformal conductive layer, the conductive spacer and the conductive plug. A dielectric layer is formed on the bottom electrode. A top electrode is formed on the dielectric layer.
REFERENCES:
patent: 5930621 (1999-07-01), Kang et al.
Wang Chuan-Fu
Wu King-Lung
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