Method of manufacturing mask ROM devices with self-aligned codin

Details Method of manufacturing mask ROM devices with self-aligned codin Method of manufacturing mask ROM devices with self-aligned codin

1998-06-25

2000-11-14

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438278, H01L 218246

Patent

active

061469491

ABSTRACT:
A method for forming mask read-only memories comprises: A gate oxide layer is formed on a semiconductor substrate. A polysilicon layer is formed on the gate oxide layer. Then, a silicon nitride layer is formed on said polysilicon layer. The gate structures are defined by patterning the silicon nitride layer and the polysilicon layer. Subsequently, the silicon oxide spacers are formed on the sidewalls of the gate structures. An ion implantation is performed to form the buried bit lines in said semiconductor substrate between said gate structures. A BPSG layer is formed on said semiconductor substrate. Then, the BPSG layer is polished until the top surface of said gate structures and the silicon nitride layer is removed. A conductive layer is formed along the surfaces of said residual BPSG layer, silicon oxide spacers and polysilicon layer.

REFERENCES:
patent: 5670402 (1997-09-01), Sogawa et al.
patent: 5869373 (1999-02-01), Wen

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