Method and circuit for preventing and/or inhibiting contention i

Details Method and circuit for preventing and/or inhibiting contention i Method and circuit for preventing and/or inhibiting contention i

1997-06-19

1998-12-22

Mai, Son

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

326 27, 326 87, G11C 700, H03K 19003

Patent

active

058525793

ABSTRACT:
A Static Random Access Memory (SRAM) comprises an input/output pin and driver means connected to the input/output pin. The driver means are configured to drive the input/output pin to a voltage potential using a first current, and are further configured to hold the input/output pin at approximately the voltage potential using a second current. In one embodiment, the driver means may comprise a driver unit for driving the input/output pin to the voltage potential, a bus hold circuit for holding the input/output pin at the voltage potential and a control unit connected to the driver unit and the bus hold circuit. The control unit may activate and deactivate the driver unit and the bus hold circuit.

REFERENCES:
patent: 4820942 (1989-04-01), Chan
patent: 5063308 (1991-11-01), Borkar
patent: 5471150 (1995-11-01), Jung
patent: 5517129 (1996-05-01), Kaplinsky
patent: 5708386 (1998-01-01), Chow

Affiliated with

Also associated with

Rating

Method and circuit for preventing and/or inhibiting contention i does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuit for preventing and/or inhibiting contention i, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit for preventing and/or inhibiting contention i will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2052968