Method of making high performance MOSFET with integrated simulta

Details Method of making high performance MOSFET with integrated simulta Method of making high performance MOSFET with integrated simulta

1998-09-21

2000-10-31

Zarabian, Amir

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438180, 438299, H01L 21336

Patent

active

061401919

ABSTRACT:
An integrated circuit and a method of making a transistor thereof are provided. The method includes the steps of forming a first stack on the substrate and a second stack on substrate in spaced-apart relation to the first stack, where the first stack has a first layer and first and second spacers adjacent to the first layer and the second stack has a second layer and third and fourth spacers adjacent to the second layer. A gate dielectric layer is formed on the substrate between the first and second stacks and a first conductor layer is formed on the gate dielectric layer. A first source/drain region is formed beneath the first conductor layer and a second source/drain region is formed beneath the second conductor layer. The first and second layers are removed and a first contact is formed on the first source/drain region and a second contact is formed on the second source/drain region. The method integrates gate and source/drain region formation and provides for gate electrodes with work functions tailored for n-channel and p-channel devices.

REFERENCES:
patent: 5552331 (1996-09-01), Hsu et al.
patent: 5955759 (1999-09-01), Ismail et al.
Stanley Wolf and Richard N. Tauber; Silicon Processing for the VLSI Era, Volume 2--Process Integration; pp. 144-152, 316-319l 392-400 and 434-435; 1990.
Stanley Wolf and Richard N. Tauber; Silicon Processing for the VLSI Era, Volume 3--The Submicron MOSFET; pp. 421-423 and 641; 1995.

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