CMOS device and method for manufacturing the same

Details CMOS device and method for manufacturing the same CMOS device and method for manufacturing the same

1995-05-17

2000-07-18

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257371, 257401, 257402, 437 56, 437235, H01L 2976

Patent

active

060911166

ABSTRACT:
A CMOS device includes first and second wells formed in first and second regions of a semiconductor substrate, respectively. First and second transistors are formed in the respective wells. A third transistor is formed in a third region of the semiconductor substrate outside of the wells. A first impurity layer is formed in the vicinity of the depletion region of at least one but not more than two of the first, second, and third regions, and a second impurity layer, deeper than the first impurity layer, is formed in the region(s) of the substrate in which the first impurity layer is not formed. A method for manufacturing such a CMOS device enables the punch-through voltage characteristics of the first, second, and third transistors to be optimally different, without requiring any additional, separate mask processing steps.

REFERENCES:
patent: 4716451 (1987-12-01), Hsu et al.
patent: 4907058 (1990-03-01), Sakai
patent: 5362981 (1994-11-01), Sato et al.
patent: 5548148 (1996-08-01), Bindal

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