Method of fabricating a gate connector

Details Method of fabricating a gate connector Method of fabricating a gate connector

1995-10-18

2000-07-18

Smith, Matthew

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438238, 438239, 438386, 257301, 257296, H01L 218242

Patent

active

06090660&

ABSTRACT:
The present invention is a DRAM cell, comprising a transistor having a gate, the gate having an individual segment of gate conductor and a conductive spacer rail wordline in contact with the segment gate. The wordline connector is formed by directional etching a conductor formed along a sidewall above the gate segment. The sidewall is formed by etching a groove in a mandrel. The structure permits design of a five square folded-bitline DRAM cell.

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patent: 5384277 (1995-01-01), Hsu et al.
"Silicon Processing for the VLSI Era vol. 1--Process Technology," S. Wolf and R.N. Tauber, Lattice Press, pp. 1-6, 1986.
"Webster's II New Riverside University Dictionary," The Riverside Publishing Company, p. 1052, 1984.
Patent Abstracts of Japan vol. 13 No. 496 (E-843) (3844) Nov. 1989 & JP-A-01 199465 (Oct. 8, 1989).

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