Precharged wordline decoder with locally-controlled clock

Static information storage and retrieval – Read/write circuit – Precharge

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Details

36523006, 326106, G11C 800

Patent

active

057372705

ABSTRACT:
A precharge wordline decoder is disclosed that comprises a first logic circuit that receives a first clock signal from a clock driver for enabling the discharge element within the first logic circuit. The wordline decoder further comprises a delay circuit for generating a predetermined delayed clock signal from the first clock signal, the delayed clock signal being locally-controlled. A second logic circuit of the wordline decoder receives the delayed clock signal for controlling wordline driver elements. The first logic circuit also receives the delayed clock signal for disabling the precharge elements of the decoder.

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patent: 5598375 (1997-01-01), Yang

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